Working with PCB I switch off visibility of Values and References. But whenever I move any footprint its Value and Reference is shown.
Is it possible to switch it off?
This seriously disturbs me - when moving 0402 elements I don’t see their CrtYd rectangle as it is hidden by texts. I have to place them several times and then after clicking somewhere out of element check if it happened to place it correctly or not (I have Value and Reference at CrtYd so manipulations with layer visibility will not help).
I like KiCad even generally I hate programs thinking that they know better then me what I wont. As I have switched Value and Reference off then why someone thinks that I have done it by mistake?
Usualy the value is only on the Fab layer, while the reference is both on the fab and silkscreen layers.
Have you considered turning these whole layers off during (a part of) component placement?
Another workaround is to (temporary) set those layers to a less annoying color, or high transparency.
Another workaround could be to make custom footprints for your 0402 parts, in which these text are some distance away from the footprint. You probably have to move most of the silkscreen text anyway when you’re cleaning up the silkscreen, and then you have the dark blue lines pointing to the footprint the text belongs to, so there won’t be confusion from that direction.
I think the logic behind this is that it’s better to see everything belonging to the footprint when you move it. Otherwise you may accidentally move for example silk to a wrong place without noticing it.
Possible solutions (changing how KiCad works):
- Just obey the appearance settings, with the caveat mentioned above
- Make them visible but dimmed/transparent
- Make it configurable, show always/show according to the appearance settings
Could you file an issue?
There’s no reason why the UI can’t be more sophisticated handling this kind of operation. It could for example:
- Highlight all footprint attributes when selected
- Dim everything except the outline when moved
- Highlight again when stationary
Windowing systems can tell the difference between select and move events. But enhancements like these are probably for the future.
You missed that I have written that I have Value and Reference at CrtYd. It is the effect of my researches how to get from KiCad documentation I wont I have done before starting to use KiCad.
Since ‘always’ we were doing our documentation that way that we have the CrtYd rectangles with references at one picture and CrtYd rectangles with values at second one (both with gray copper).
CrtYd rectangle is the biggest rectangle of element you can get so in most cases the reference (and sometimes the value) manages to fit inside. Picture at fab layer makes reading the ref and value more difficult.
I use only custom footprints. And effect expected is to have these texts as inside of CrtYd rectangle as possible assuming the same text height for all elements at PCB (I use 1mm/1mm/0.15mm).
What I like in KiCad (compared to Protel 3 I used before) is that in most cases I need not to position refs and values as they are automagically centered inside my CrtYd rectangles. In Protel I had to position each of them as after inserting the netlist they were really randomly positioned somewhere around the element. So at beginning of that positioning work I had many times inside the element the ref of another element. That feature in KiCad saves me some work I have always done after my pcb was finished.
To tell you the truth I don’t understand what ‘cleaning up the silkscreen’ really means.
Once more - since ‘always’ we just didn’t used silkscreen at our PCBs. We used silkscreen layer as in KiCad I use CrtYd layer - only for documentation purposes. When we needed to place some text (for example the terminal block pin descriptions) using silkscreen possibility we drown it at some mechanic layer and send to PCB manufacturer to be used as silkscreen. In KiCad having more layers I started to use silkscreen but I have in my footprints the silkscreen pictures which are ready to use. I need not to do anything with them. If I have to do something that means that I have error in my library and I repair it there and not at the PCB.
I have all except CrtYd and pads switched off. I hope it is not possible to move element not as a whole
Not now. After month spend on drawing the (one sheet) schematic (I’m too accurate when choosing elements and specially this time I changed my mind several times) I started yesterday afternoon to do PCB that I should have done two weeks ago. So if you think it is worth of specifying what should be probably changed I’d be happy if you do it.
I’ve got some holes in my bain, sometimes I miss “sentences”.
I think I’ve got a better understanding of your workflow now.
An option to not show those texts during a move would be a logical choice, but a change in KiCad, I can not help with that.
For me “Cleanup of silkscreen” means that during the first 80% of a PCB layout I turn those texts completely off by disabling the layers they are on, and then, at the end there is lots of overlapping texts on the silkscreen, so I disable the copper layers (and most others) and put silkscreen text in locations where it makes sense to me.
That is the advantage of using layers, and you loose when you put those texts in a different layer.
Also, Courtyard is a bad layer to put those texts in. It has a very specific meaning in KiCad. The rectangles in KiCad’s footprints on the courtyard layer are dimensioned in such a way that automated pick and place machines should be able to make the PCB if the courtyards do not overlap.
Normally the “Fab” layers are for fabrication documentation.
It seems a bit unfair to blame KiCad for abusing the layers.
It is easy to move certain items to other layers with:
Pcbnew / Edit / Edit Text and Graphic Properties
With the settings below for example, I have moved all Footprint References and values (temporarily ?) to the Eco1.User layer.
The sole pupose of such layers is to be able to adjust the visibility (color transparency) easily while working on a PCB layout. And / or to be able to make specific pdf’s or hard printouts for documentation or other custom purposes.
So use more layers.
Do not put stuff on layers it’s not supposed to be on.
A part of KiCad’s DRC is to check for overlapping stuff on the Courtyard layers. Does that function get confused by your texts on courtyard, or have you simply disabled that function?
What I didn’t liked most in Protel was the long time needed to prepare documentation. That process contained among others something like you name ‘cleanup a silkscreen’, but I didn’t placed texts somewhere around footprints but as much inside (CrtYd rectangle I had at Silk layer there) as possible (4 separate processes - values and references at top and at bottom). It happened several times that I had a matrix something like 3x5 of 0603 placed one touching the another. No way to place those texts around to be clear which one is for which element (fortunately we didn’t printed Silk layer at our pcbs).Then there were a problems (to print these elements black on gray copper) that for example vias hided that texts during printing and we didn’t found the way to solve that other then going with each layer through gerber files and importing them into temporarily opened new PCB file (there were total mess as bottom layers were imported as mirrored so you just didn’t see your real pcb there. I had to have a cheat sheet with all steps to be done in that process to get the good result, and even this it happened many times than when I got one of four pdfs (for exampple top+refs) I noticed that I wrongly did one step and I had to do a part of work once more.
Because of this when I started to be interested in KiCad (4.0.6/4.0.7) my first action was to find if it is possible to have this process be done as simple as possible.
I didn’t found the way to do it with ref and val organised as in KiCad libraries. It was enough long time ago to me not remembering exactly what was the problem, but I suppose with standard libraries it is still not possible to get my pictures. My first solution was to have exactly the same rectangles at CrtYd and Silk and val and ref - one at Silk and one at CrtYd. It is because in Export to SVG there are no flags for on/off val and ref. The idea was to export the right set of layers directly to SVG. But I found a next problem - to do that I had to change temporarily colors of layers to black and gray (it was simple) and had a problem to get back to right colors (not saving the file before closing the program didn’t helped). The end effect was that I gave up to get my pictures directly from KiCda and decided to go with them through inkscape - so I could use Plot to SVG instead of Export and could use for my pictureas only one layer (the logical choice was CrtYd as the rectangles tere are as I need. That way I freed the Silk layer from my documentation needs so with KiCad I added silk to our PCBs. But at silk I have only some lines showing element positions (I like to save my time when possible (have only one live) so don’t place there any ref or val as placing it would need the ‘cleanup the silkscreen’ done for each PCB - lost of time in my opinion (is silkscreen with ref or vals really needed for any real purpose).
In my opinion I am trying to win and not to loose. With default way texts are placed on layers I didn’t found (I was searching with 4.0.7) the way to get pictures I wont (the element position (max rectangle around it) with ref inside (and value at separate picture with the same rectangles) on gray copper. In my opinion it is the best picture showing pcb at b/w paper print (or I am just used to it) and I see nothing wrong in trying to get them as simple as possible.
So the only other solution I see is to use silk for that purpose but then I would prefer to have there rectangles exactly the same as at CrtYd and some marks like for example +, -, ~, ~ for diode bridge that could collide with pads so the end my decision would be to get back to not use silk at PCB.
Currently I prefer to have some picture at silk. As for my pictures I need rectangles as ‘by definition’ are at CrtYd the logic for me seems just to use CrtYd for it.
The rectangles I need are exactly the same size.
But there are mechanical dimensions of real elements - much smaller then rectangles at CrtYd - I use 1mm high ref, and val texts. Remember my example of 3x5 0603 matrix - the only no doubtful solution is to place texts centrally on element and lines at fab interfere with reading the values or text have to be much smaller.
I place ref and val (in footprint definitions) centered inside CrtYd rectangle and I have them automatically placed as I need them for my pictures - with 0 work of ‘cleanup’ of anything as my plan was from beginning. I prefer to have this 0 work then to follow the conception I don’t understand. I have read all documentation pdfs (where 4.0.7 was current) and I don’t know what is the conception of ref and val (and copy of one (don’t remember which) of them) use as they are assigned in KiCad footprint libraries. Don’t remember any sentence explaining that (may be I just overlooked it).
I got nervous after several times I failed to place 0402 capacitor touching the other two elements (in corner made by them). Such basic task and a problem with. I’m not proud of what I have written even to little soften my thesis I started from ‘I like KiCad…’
But I really think that however anyone use layers (I would not call what I do as abusing the layers) if there is the check box to hide something then the user has the right to suppose that his decisions are simply executed.
Way around but need several steps if you have elements at top and bottom.
So which layer you suggest to use for my documentation needs? Remember that element can be flipped between top and bottom.
It was not when I made my decisions (4.0.7). Before starting my first KiCad PCB I have decided how I wont to have my footprints and made something around 200 of them.
Now I have them all done according to my decisions. If there will be added any new layer (traveling with footprint between top and bottom) I will modify all my footprints but not before as I don’t see the other sensible solution that I have choosen.
No it is not confused.
But generally I don’t need that function. I know what I am doing positioning elements. Consider a serie of SMB transils (I don’t have KiCad lib here at home). Sometimes I placed them in 0.1 or 0.2mm smaller distance then my rectangles because of lack of space. I suppose that doing this with KiCad SMB would be also possible and with no problems with automated pick and place. Also it happens that sometimes one element is placed over another (in my last PCB it was E ferryte laying at its back and the small pcb with 3 openings and coils placed at its legs and connected to main PCB with 3 pin header. I think if whenever I will get any error from it what I will do would be to switch that function off.
Changed my mind. I am moving with ref, val and pin1 and cathode marking to silk. And replace all lines I had at silk (little inside CrtYd) with lines going exactly as CrtYd.
It is not the best solution but more in accordance with KiCad.
For me there is a lack of one more layer being F. and B. I considered to use .Adhes as I never needed it but I can’t be sure of future needs.
There is F.Fab and B.Fab. Or are you using those for something else? (I got a little confused with the above discussion.)
At Fab layers I have true dimensions of elements.
At Silk there is what I wont to be printed at PCB.
At CrtYd there is the place occupied by element rectangle.
What I need (and it was my first researches in KiCad before I even start to do my fist experiment pcb) is the layer with what I wont to be printed in documentation.
What I need there are:
- the rectangle as at CrtYd,
- the pin 1 (cathode) marking,
- the value at one print and the reference at second one.
My solution 1 was to use CrtYd and Silk for it (one with ref, and second with val) to be able to print documentation directly from KiCad.
My solution 2 was to use CrtYd for it as the rectangle I need is exactly that is at CrtYd (I made that decision before CrtYd checking was introduced).
Yesterday I setup my solution 3 - I spend a day modifying all my library footprints. I have:
- deleted all what I had at Silk Layer (rounded rectangles for capacitors, interrupted rectangles for resistors, standard rectangles for inductors,… - all that was made inside the CrtYd rectangle and with 0.1 mm width lines),
- drew at Silk the rectangle exactly as at CrtYd (with 0.05mm width lines),
- moved pin1, cathode, +,- markings from CrtYd to Silk,
- changed the val and ref texts layer from CrtYd to Silk.
Now I am in one subject happy - when moving footprint val and ref don’t show up unexpectedly - so I have the problem from thread title solved.
But that is at the expense of another problem - I can’t have different picture at PCB and in documentation.
The example when it can be useful:
For that small PCB footprint (used at main PCB):
- I wonted its rectangle in documentation to be clear what the ref/val texts belongs to,
- I don’t wonted its rectangle at PCB as its lines just crossed other elements laying under it.
The other situation when I don’t wont Silk but wont it in documentation are footprints not installed. An example is connecting two PCBs with one pin header (soldered to both PCBs). It needs to be assembled only at one of these PCBs. The rectangle around pins at the second one tells: “something is missing here” what is not true so I don’t like it.
I also don’t wont circles around pads intended to solder wires as contract manufacturer assembling our PCBs need not to assemble there anything. My idea is - all silk shapes are filled = nothing missing.
Why I don’t even consider to use fab layer for it. The answer is - I wont to have real part dimensions to be seen if needed and that pictures collide with ref/value texts. My CrtYd rectangles tells me how I prefer to place elements one to another, but in some rare cases when I have really no place I decide to place something more close to each other and then I need to see real part dimensions. For example electrolytic THT capacitors:
- at fab I have circle with maximum radius specified in pdf,
- at CrtYd I have 0.4mm bigger radius as my normal intention is to left that 0.4mm free.
But there is no need to have 0.8mm (really more as they typically don’t have their maximum radius) between two such capacitors as you need not the place to get there with soldering iron so if needed I place them closer.
Also sometimes I had to place the 0603 element next to such capacitor breaking the CrtYd lines. In practice it is no problem as 0603 is assembled first and capacitor later.
In all such cases I won’t (during placement) to see the real element dimensions.
For 0402 my refs/vals hardly fit in their rectangle (like CrtYd) but they absolutely can’t fit into 0402 real dimension picture. It is why I don’t use Fab layers for documentation.
Hope I am enough clear now.
And I found the next one I didn’t predict - I can’t get 3D view as PCB will lok like. I have val/ref switched off but they are at 3D (one on another and both under elements). There I can switch off the whole silk but it is not how pcb will look like.
I am considering to get back to my solution 2 (was better - I can switch the CrtYd checking off) or to use Adhes layer for my documentation.
Or move Fab pictures to for example Eco1. For real element dimensions it will be no problem if top and bottom will be mixed.
If I switch the val/ref visibility off in footprint editor that PCB in 3D view will look like I wont, but they also disappear from export to svg even I check that I wont ref or val.
I have made myself the whole day of work only because I didn’t wonted to switch the CrtYd checking off
Yesterday you decided to move stuff to the silk screen layer, and now you don’t like it because KiCad puts the text on Silk screen for you???
Silk screen, copper, paste, etc have very specific meanings in KiCad.
Don’t put stuff on the adhesive layer because you don’t need that layer yourself today.
Layers free to do anything with you want are:
The intended use of the Fab layers seems to be the closest to what you want. These are meant for fabrication notes.
Dwgs.User seems a more logical choice for dimensions.
You are of course free to deviate as much from such conventions as you like, but I guess they’ll turn back to bite you in the future. Maybe in the next KiCad version. Unless you completely abandon KiCad’s libraries and make all your symbols and footprints yourself.
I used to be this way too. Did lots of tweaks and twiddling on user interfaces, and each time I bought a new computer, upgraded my OS or installed a new program I spent many hours on this.
Somewhere in the past I stopped doing that. I still have a memory of some very ugly color schemed for a schematic, but after some time you just get used to it. I’m not even sure if that was about Eeschema’s color scheme.
In the end it was just a huge time saver to stop twidling with such settings.
But don’t understand me wrong here. Some things are useful to change. But if you change them, try to fit your changes in with the default, instead of figthing a program and it’s libraries to confirm to your personal ideas.
I moved to silk with my stuff destined for paper documentation and not silk. I have val/ref both at the same place - one over another as I print them separatelly - I put two pictures of my pcb - one with val, and one with ref.
This will not be a problem with real PCB as while plotting silk I can switch ref/val plotting off. But at 3D view I can’t hide them (since I have a possibility (never had before KiCad) to add 3D to documentation I like to do it).
None of them can be used for my stuff. I have elements at both pcb sides. If I use any of these layers I would be not able to print elements placed at one side only.
I am now in half the way of adopting my ‘solution 4’. I:
- went back to my solution 2 with silk I had before (just from backup),
- moved the actual-sized element pictures from Fab to Eco2,
- moved my documentation stuff from CrtYd to Fab.
And now I am manually adding the CrtYd layer to all my footprints. In one/two hours I will have it done.
The only disadvantage of this (as I know) is that I will have x-ray eyes when looking at real elements pictures
I had there (at Fab) true actual-sized element drawings and not dimensions (was not sure how to tell it precisely and short so I was not clear).
At Dwgs.User I have dimensions of PCB - something that is needed in documentation, can’t go there with elements themselves.
I had never the intention to deviate. I am only (since my first reading anything about KiCad) looking how to find the right layer for my documentation stuff. It is connected with elements so should be one of layers having their F and B versions.
Until CrtYd was not checked in DRC seemed for me the good solution. Drc has nothing against my texts there, but the polarity marking are questioned. Now I moved to Fab accepting the expense of having actual-sized elements drawings of front and bottom layers mixed together.
If there were one F/B layer more I would had no problem with it at all and would not have to change my solutions and this discussion would never had a place.
I am using only my own symbols and footprints.
I’m just used to work at white background so I have set my set of colors for PcbNew.
I don’t feel myself as doing this.
The problem is:
- the crtyd picture should be separate for Top and Bottom,
- the silk should be separate for Top and Bottom,
- the actual-sized elements drawing should be separate for Top and Bottom,
- if any other picture of elements is needed for documentation it also need be separate for Top and Bottom.
And there are only 3 layers you could use for any of that.
You can say that my need for documentation are just my personal ideas and you are right. But I just don’t see the better way of doing this than how I am doing:
- in footprints I place both val and ref centrally in element CrtYd rectangle,
- when I have PCB designed I need practically no work to generate the documentation pictures - all texts are where they are intended to be. Only some longer values colide sometimes with others and need be moved. For most elements (resistors, capacitors, ferryty beads) I need do nothing.
I mostly go with the flow.
You reminded me of something I found a bit strange.
Normally you can make new layers in a CAD program and give them any name you like. In KiCad, the number of layers is fixed, and only the copper layers can be renamed.
It seems that your workflow would be easier if you could add some layers with custom names in “Board Setup”, and also with a checkbox for “front” or “back”, which is sort of equivalent to “mirrored”.
This is such an obvious missing feature that it’s probably on the wishlist on gitlab. I do care enough to vote it up if you find such an wish, but not enough to go searching for it myself.
It is more complicate here than in other CAD programs. As added by you layer should be selected as:
- front belonging to footprint (go with footprint when flipped) - but go to what layer,
- back belonging to footprint.
So you have to have possibility to specify what layers added by you are paired.
I think one F/B layer pair and may be 2 extra (ECO3, ECO4) instead of possibility of adding new layers should be enough for everyone and simpler to do.
This reminds me that the search in Gitlab can be very frustrating, most of the time I get this message when trying to find something by searching the issue list
This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.