TO-254AA footprint

Is the TO-254AA package a non-standard package type or not widely used? I was hoping to find an already built footprint and was wondering if I am by chance missing something?

The datasheet specifies in the notes that package outline confirms to JEDEC outline TO-257AA which I also don’t see in any of the package libraries but I guess either can be used?

Thanks for any assistance, footprints are not my specialty being mechanically disinclined! :slight_smile:

If I do an image search for TO-254 I see packages that look like they were made in the '70-ies.

Clicking through on a link however suggests that they’re used for SiC (which has very high operating temperatures of several hunderds degree Celsius, so packaging becomes the limiting factor)

Making new footprints in KiCad id a breeze however. I would not even consider searching the 'net for more then 2 minutes to find a footprint for a simple 3 pin THT part like this.
KiCad’s Footprint Editor works well, is nicely integrated with the rest of KiCad and it’s UI is very much the same as for Pcbnew. The most complicated part of it is the library management, because KiCad’s own libraries are read only, you have to put custom Footprints in a custom library.

This is a good start:

This is also good:

Although you probably do not even have to start from scratch.
You can easily start from a copy of a regular TO-220 or TO-247 and adjust things a bit to your liking.

There are also sites such as snapEDA where you can find Footprints, but these sites seem to be more trouble than they’re worth. A common problem with these is graphics on Edge-Cuts layer which is not handled well in KiCad, and (figuring out how to) repair it is more work than designing the thing from scratch in the first place.

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Thanks for the response! I never said we were modern here…haha, welcome to space. I really appreciate the assistance this community is stellar!

I agree for most parts creating the footprint is easy. This one felt a little awkward to me as I wasn’t sure how to make the thermal pad with offset hole that will connect to a ground plane for thermal dissipation but I believe I have that solved…using the offset feature int he pad window.

But now I am trying to figure out TH placement for the leads not understanding how far from the thermal pad they need to be once lead-formed.

I didn’t realize the package was so old and now makes sense why I couldn’t find a pre-built one.

I also struggle with some of the mechanical dimensions on the datasheet. For example below shows the leads as max of 1.14mm thick but it seems like it is showing a hole size below it in the datagram of 0.36mm…

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I did not write the package was from the’70-ies, just that it looked it was designed in that era. Your case outline has a date of 2016-12-20 which is not very old.

The 0.36 is a tolerance, not a dimension. It shows how straight the pins are related to the referance surfaces A and B. I’m not sure what the M and the L in the circles mean, but I am sure they conform to some norm and can be looked up.
The 0.12 in the right top corner is another tolerance and is for the flatness of the mounting surface [B].

Forming of the leads is an art in itself. For high volume production you want to completely automate this, and there are machines that do this. Some even can add S-bends in the leads to allow for thermal expansion.

You can get to a sensible value with a bit of common sense and calculating backwards.
Assume you have a PCB of the normal 1.6mm thick and you want the tips of the leads to stick out 1mm.
This gives the place for the bend 1 + 1.6 + 3.81 = 6.41 mm from the underside of the leads.
The distance from the center of the mounting hole to the center of the pin holes will then be approx.
paul@dualcore:~/projects/python3$ python3

.>>> case = (17.4 + 16.89)/2
.>>> lead = 13 - 6.41
.>>> case + lead

You do not want to bend the leads too close to the body of the package to prevent bending stress. More standard pins are made from stamped sheet metal molded into the plastic body, but your TO-254AA looks like the pins are made from wires and there is a glass or ceramic isolation ring which may get damaged under bending stress from the leads.
So if you want to bend the leads yourself, you have a hole to hole distance between approx. 21 and 24mm. If it is intended for high volume production you should contact the factory which will make the boards before making a final decision.

Also, for the final size of your holes, there are probably norms about tolerances and such. If you want to keep it simple, then compare KiCad’s library symbol for both TO-220 and TO-247 and compare the hole size with the pin size for these packages. Your TO-254 is somewhere in between those. A coarse guess would be between 1.4 and 1.7mm.


Thank you for the continued discussion. Yeah sorry I meant to say I didn’t realize the package design (not necessarily the part) was so old and it makes sense considering the application. The part is still maintained but not easily purchased anywhere.

In any event for reference, this is a one-off quick-turn design and not intended for volume production. I am merely replicating a customer setup. The parts will be lead formed by hand and installed manually. I do understand the careful need to form the leads well away from the glass seal interface. The board will not experience any dynamic environments beyond handling.

The board is 3 layers (all planes) and four of these diode packages will be mounted to it. There will be an anode plane, cathode plane, and ground plane mainly for heat dissipation.

Is it ok to use a SMT pad with an offset hole as shown above to help thermal dissipation into the ground plane? The other package examples in KiCAD only use a mechanical hole with an outline for the tab which of course can be connected to the ground plane but I would prefer to spread the heat. I don’t believe heat sinks are necessary using the board as one in its place. There are no other components on the board only through holes connected to the planes to bring the wires onto the board.

The problem I have creating footprints from scratch is getting everything positioned correctly on the grid referenced back to the datasheet. Seems silly but I guess I am spatially impaired, lol. Again thank you and I will you the information you provided and read through the references to try to get a working footprint.

My advice here is to leave enough space from the component body and the bend for the jaws of your needle nose pliers. This allows you to hold the legs with the pliers and form the bend against the side of the pliers opposite the component body.

But the component legs will due to thermal expansion and contraction as they heat up and cool down (known as thermal cycling). Unfortunately, all I really know about thermal cycling is it exists. I don’t have enough experience to help you evaluate the risks in your application.

If you were designing from scratch you might consider keeping the legs straight and mounting the diodes to an off-board heat sink. But since you said you are copying another design your hands may be tied.

I agree with all you said. Luckily I am very well acquainted with thermal cycling as we do it on all our production units along with thermal shock, vibration, dynamic shock, you name it! Haha, but in this case I am not very concerned in this case for those issues. The thermal expansion at the lead to glass seal interface due to self-heating should be minimal but yeah it is considered.

I could mount these to a heat sink and stand them vertically but since the board is only for these four identical components I figured the board could be the sink.

I was mainly hoping to find a drop-in footprint but life isn’t that easy. Most of you guys could pound this out in minutes but I really stink at translating the spacing between holes, etc from the datasheet. When a recommend pad layout is offered it is also easy.

Kids are finally in bed so hopefully I can take the recommendations here and produce a working footprint in short order. I’m still not sure if an actual pad for the tab is correct but I guess I’ll find out.

OK well using the very helpful information on where the lead hole location should be and the TO-247 footprint as a guide I think I have a working solution. Printed it out and will check it against the part in the morning. I very much appreciate the assistance, this community is awesome!

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Check your pin numbers. According to the snip of the datasheet that you posted here the pins should be numbered 1,2,3 and not as you have here as 2,3,4. The pin number of the tab could be any of those 3 numbers. In KiCad you can have multiple pins of the same number, useful for automatically forcing you to connect the pins together during layout. Optionally, you can make the tab 0, 4, or TAB (yes pin numbers accept alphanumerics and don’t necessarily need to include a number). But you would want to make your schematic symbol a 4-pin symbol with the same pin numbers as your footprint.

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Yeah I screwed that up but realized shortly thereafter. Thanks for keeping me honest as that would definitely not have worked. Once I got it on the board and saw what nets were connected to each pin I realized I messed up.

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IPC-2221 has the information you want to construct this footprint.

Here are lead bend from body images:

However, these are for axial parts with round leads so I think it should work out for this package. The longer the better for mechanical stress, and the bigger radius the better. My experience says if the radius is half the distance from the leads to the board (1.905mm in this case) you get the best mechanical strength and less chance of breaking in the field. Granted, that’s hard to do by hand.

Regarding drill hole size, you want to be 0.2mm over the max lead. A bit bigger isn’t going to hurt, especially if you’re soldering by hand, so 1.35-1.5mm ought to be OK.

For the annular ring, I’d go with the most conservative IPC recommendation (Level A) as a lower bound which is 0.7mm over the drill. So make sure there is at least 0.35mm between the edge of the hole and the edge of the pad where copper is on the board. For the footprint above, that will be on the left and right sides of the pads. There’s not a specified upper bound in the doc but going as big as you can while ensuring adequate voltage clearance (plus the PCB fabrication tolerance!) is probably a fine place to be. But do make sure the gap between the pads is adequate!

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