Tip for reordering ratsnest in PCB design?

Hi all… I am designing a circuit where I want to connect a multiplexer to a sort-of bus that will be full of sensors. The schematic design looks nice an tidy:

I have a specific pin assignment defined in my schematic. However, that actual ordering of the pins is not very important to me, because I can correct that assignment in software. The problem that I am facing now is that in the PCB-designer, I get a ratsnest where a bunch of signals are criss-crossing each other, even though my design really does not require that Pin1 of the connector J1 is connected to A0 of U1.

The easiest way to solve this that I know of is to edit the footprint of the connector and reorder the pins. However, I thought what would even easier is to be able to decouple the data pins in the PCB (I know, not ideal, but convenient) and then just draw in the traces between the connector and the chip as needed, not caring about the order, effectively deleting the ratsnest for only those pins only. Is that possible somehow?

Does someone have a good idea how to do this task in an easier way even?

KiCad Version is 5.1.12

My relevant network files can be downloaded from here, in case you are interested: http://craftware.info/projects/share/temp-net.zip (for loading the schematics, you will need to add local.lib)

(Edit) I accidentally, deleted my “thank you in advance” when correcting my post. I am keeping looking but directions would be welcome! :slight_smile:

The footprint is a physical fixed entity. Randomly changing pin numbers isn’t the best option. I’d look at changing the pin numbers on the schematic symbol to something that makes the best layout sense.

In your example, the first thing I’d do is try rotating the IC (or the connector, but that’s probably fixed physically).
The second step would be rearranging the outputs, followed by back-annotating the schematic. I’ve always done this manually, so I’m not certain of the capabilities of KiCAD here.

DON’T edit the symbols or the footprints, in the end they’re locked to a supplier data sheet.

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Rearranging the pins on symbols is quite common place to keep a schematic readable. If the chip were laid out like the symbol above then we wouldn’t be having this conversation. :wink:

Simply reorder the pin numbers on the connector symbol to line up with the way you wish to connect the chip. Will it read 1 thru 8 sequentially? No but we are making a PCB here.

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Please expand on this, because I don’t understand the sentence, sorry.

Symbols need not be, and are often not, faithful representations of the physical chip layout. That is why the OP is unhappy with the mapping on the board. To me the neatest and most logical solution is to change the pin numbers on the connector side.

Hey there, thanks for the answers!

the first thing I’d do is try rotating the IC (or the connector, but that’s probably fixed physically).

Got to that point, too. Got a nice initial first design going with that:

That “feathering” of the traces requires quite some surface area though… oh well.


The footprint is a physical fixed entity. Randomly changing pin numbers isn’t the best option. I’d look at changing the pin numbers on the schematic symbol to something that makes the best layout sense.

Yes, of course, that makes more sense. And yes, would be great for the chip to have neatly ordered pins as well, but well, that is not up to us, I guess :smiley:

Right now I have “fudged” it by dissolving the ratsnest in the PCB designer from the connector side (found the button for that) and then relabeling pins with the netnames that were handy to connect. Quite a bit of tedious work. I will now try to renumber the pins on the schematic to match what I did on the PCB. I hope that the netlist still is compatible after this little back and forth, but since I never changed any names, I do not see a reason why this should fail.

In case anyone else is seeing this and looking for the button: Double-click a pad that you want to disconnect from the ratsnest and you get a big dialog box where you can edit the “Net name”.

I was exactly wondering if there are some tools available for this “reconnecting” from the PCB desing, but, well, if not I can work with this.


Symbols need not be, and are often not, faithful representations of the physical chip layout. That is why the OP is unhappy with the mapping on the board. To me the neatest and most logical solution is to change the pin numbers on the connector side.

Like I said, I will try this now. If it works as expected to work backwards from the PCB design like I did without loosing the link between the schematic and PCB design, this is not too bad at all. I will report back if everything worked here!

The feature which could change pins easily would be called pin swapping, https://gitlab.com/kicad/code/kicad/-/issues/1950.

OP. You have to map pins 1, 2, 4, 5, 12, 13, 14, 15. So change connector to something like:
Chip Connector
A4 (1) 1
A6 (2) 2
A7 (4) 3
A5 (5) 4
A3 (12) 5
A0 (13) 6
A1 (14) 7
A2 (15) 8

Sometimes I open both Eeschema and Pcbnew next to each other, and then first draw a partial layout of the PCB, and only connect the wires in the schematic after I have the PCB layout figured out.

If you want the schematic to look “neat” on top of that you can:

  1. Create a project specific schematic symbol library.
  2. Copy an existing schematic symbol for a connector into it.
  3. Rearrange the pin ordering.
  4. Use that schematic symbol in your schematic.

Oh boy, now that I did it manually, I think that would be a pretty awesome and handy feature :smiley:

Hey thanks… relabeling the IC… that would have been the way better option! My brain thought it was better to relabel the connector for some reason yielding this abomination:

grafik

Number salad. I think I am happy though :smiley:

Relabeling otherwise worked fine, and I tested that the netlists between the PCB and Schematic still match, so I can still browse views side by side. Everything works great!

That actually seems like pretty nice strategy to avoid this issue from the get go!


Thanks all for the input. Really helpful to know that I was not somehow trying to solve this in a backwards way! Pin-swap would surely be a very handy feature for this, editing symbols and creating custom libraries to solve this “neatly” does not feel super productive if you encounter this problem. But hey, it worked.

Thanks again for your help/feedback, very much appreciated!

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I feel like giving this one more post to make the story more wholesome and thank everybody one more time for their help. I got the boards now and soldered the circuit.

First of all, thanks to you all, the traces from the vertical chips on the sides to the pin header look great now!

grafik

Very nice!

Second, just in case you are interested, here the final project setup:

What is it?

It is a temperature data logger. The left-side spaghetti stuff is a net made of temperature sensors, meant to be attached to a surface. When detached from the surface, it always tangles up like this, so it typically it looks much less messy. The board provides a serial interface for the Raspberry PI below that logs data to a central Prometheus/Grafana server using WLAN. As typical, that last bit of software is not quite ready yet, so I cannot show that part. :stuck_out_tongue:

Like I said, thank you again for the help, and lets hope for a good year 2022!

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