Hi, I am trying to build a pcb and, both for my ground planes and high current tracks I am using copper fills with thermal relief option because it will be easy to solder and desolder when necessary. But some of my pins are connected with only one thin copper line to the fills. Also DRC Run gives an error about this and I am also skeptical since I will have high current (input side 10 A output side 15 A)
Here below you can see the error and some of the pins connected with just one line (SenseOUT and Drain of Mosfets). What should I do in this case ? Can I solder it without a problem if I do a copper fill anyway ?
I was last time using KiCad in 2024 and don’t remember details and don’t have KiCad here.
Solution 1.
In footprint definition (for pad not footprint, I think) you can overwrite thermal relief parameters like track width. All my ‘bigger’ footprints (like electrolytic caps) have these defined so are connected to copper fill with wider tracks.
Solution 2.
At your Q3 center pad you can manually route short wide track from pad to the left getting still one but 3 times wider connection to copper fill.
Sounds like you want to have your cake and eat it too.
That depends for a great part on the soldering iron you have. I bought C245 clone from Aliexpress recently. It’s a clone from a JBC iron and can put 100Watt or so into a solder joint. And if needed, I can also pre-heat the PCB with a bit of hot air, and that combination will definitely get the job done, even without any thermal reliefs, and even with thicker copper.
I am a little bit surprised that there are no footprints with staggered pins for the 3 pin TO-220 variants in KiCad’s default libraries. I would probably customize the TO-220 footprint and move pin 2 a bit forward, but just setting the pad to zone connection to “Solid” instead of “Thermal Relief” is probably enough. 10A is a lot of current. For such a high current I would not be using thermal reliefs at all.
For a whole footprint you can set the pad Connection to zones to one of: Solid | Thermal Relief | None on the Clearance Overrides and Settings tab of the Footprint properties. For pad properties there are indeed also the extra Thermal Relief Overrides for gap, Spoke width andSpoke Angle.
KiCad does not know that your tracks (and thermal reliefs) have to handle 10A. The minimum of a spoke count of two is simply the default in: PCB Editor / File / Board Setup / Design Rules / Constraints / Zone fill strategy / Minimum thermal relief spoke count. Also, when you explicitly draw a track (of any width) from a pad into a zone, then KiCad’s DRC treats the pad as “connected”, and does not generate DRC violation messages for the thermal reliefs at all.
Another simple trick is to use solder mask expansion for these high current pads. This does two things:
It exposes more copper, and as a result you can get better heat transfer from your soldering iron to the pad.
More exposed copper results in a bigger solder fillet, and thus less resistance around the connection and more current handling capability.
I’m afraid my answer here has become a bit chaotic. There are a lot of different tricks you can do around pad connection for high current pads, and I’m not sure how far you need to go, (or want to go).
