The most basic schematic doesn't not pass ERC check

I would like to start using ERC on my schematics as I just got a board back and a pin was not connected because my Global Label was not attached properly and I missed it. However, when using ERC I am getting quite a few errors that I don’t believe are correct. For example, if I create an empty schematic and then add a 74LS00 Unit E (just power and gnd) and connect the to VCC and GND I still get the following error. Am I missing something fundamental about how ERC works or is this a bug?

You have no power source driving your VCC net.

KiCads ERC checks which pin types are connected to which net. Every pin type has requirements for it to pass the check. Power inputs need to have a power output connected on the same net.

I guess you supply your system with a generic connector which means you somehow need to tell kicad where the power comes from. For this there is a special symbol in the power lib called the pwr_flag. It is a symbol with a single power output pin that can be used to fulfill ERC. More details see ErrType(3): Pin connected to some others pins but no pin to drive it

Ah, thanks everyone. The pwr_flag is exactly what I need which I will add to all my schematics.

Is there a corresponding gnd_flag? I’m not seeing it.

PWR_FLAG is used for both.

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ah, interesting, and I guess they aren’t considered connected then.

You are right. The PWR_FLAG doesn’t connect anything. It tells the ERC that the line is a power line when there isn’t any power output pin in the line.

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Quick clarification: Power Input pins need to have one, and only one, Power Output pin on the same net.

I.e., don’t go crazy and put pwr_flag symbols everywhere you have a Power Input pin, you will get a new ERC error (only one per net, so finding and removing all the excess may require multiple ERC passes). My personal drawing style is to put the pwr_flag symbol next to the pin that I consider the source of the power (or ground) for that net. That way the diamond shaped symbol adds information to my schematic. (Based on past discussions here, several others here also use this style regarding the pwr_flag symbol. But there is nothing written in stone that demands you use this drawing style.)

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Thanks Rene. Yes, I’ll follow your advice. :slight_smile:

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