Texas Instruments TPS63030 Ground separation HELP

Hi,
I’m designing a PCB which includes an integrated circuit TPS63030 from TI, and I have a problem. I don’t know how to separate Power Ground from Control Ground as this datasheet explains:

“Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the device.”

Look at this image from the datasheet:
https ://www.dropbox.com/s/jvtfq7smhjr87zr/tps63030-layout.png?dl=0

I designed the tracks and the filled zones like in the image above but when I fill the zones the control ground merges with the Power Ground like this:

Unfilled zones
https ://www.dropbox.com/s/yyewvxb3go5qavp/layout-nofill.png?dl=0

Filled zones
https ://www.dropbox.com/s/ag86eya3wgvn8e8/layout-filled.png?dl=0

Could anyone please help me? :smile:

Since your power ground and control grounds are the same (the same net) your filled zone of the same net will connect to both of them. An easy way to manipulate zone connections would be adding a keepout area (f.e. between the pad of L1) which would prevent ground pour anywhere past that point. However if the shape of your ground planes is more complex and it is difficult to constrain the zone from making connections, you would have to separate the grounds on the schematic level, so each ground would have a different net.

2 Likes

I like the keepout idea. Having multiple net almost requires that you live with one or two DRC errors when the board is done (in my experience)

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Thank you ArtG and ChrisGammell! I made a keepout area and it worked well. The power ground doesn’t connect to the control ground node anymore, so the control ground node passes through a via to the back copper ground plane.

:smile: :thumbsup: :thumbsup:

I sort of expected to arrive at a similar issue myself and here I am, even though I am not using TI parts at the moment! Ground partitioning is common when doing power converters or noise sensitive analog circuits. This prevents high current in one area from passing through (and inducing noise within) a different area that is noise sensitive. I do want to have two separate grounds which are connected with one (maybe 2 mm) wide trace. Right now my schematic simply has AGND and GNDREF connected but this does not work as desired (not a big surprise). It seems to me the ideal situation (at least for two top or two bottom copper planes) might be to make a component which effectively interconnects the two grounds. It would have two pads and my wide “trace” connecting them which the software somehow does not recognize as a DRC error. Of course I could really use a 0 ohm resistor but copper on the board makes a lot more sense. Does anyone know how to do this? The keepout method can probably work but sounds like more of a hassle. I would sort of think that the engineers who designed KiCad would have come up with a good way to accomplish this as it is a common requirement. By the way, depending upon the chosen zero ohm resistor, they may really be as much as 0.05 ohms or so.

Well I just made a part with two overlapping pads. I connected it between my two grounds on the schematic and pcb. I can confirm that this creates a DRC error. :frowning:

The way to do it in KiCad is to place 2 pads close together but not so close for DRC to fail. Then in the footprint editor draw a graphical line between the pad centers and make that line the width of the copper track that you want. Then edit the segment and tell the editor to place it on the copper layer. You now have what is essentially a track connecting the 2 pads; although the graphical segment in reality creates a bridge, KiCad assumes that graphical segments are not conductive and does not include them in the DRC. (An exception to that, which is a recent feature of KiCad, is text on a copper layer - for a few months now text on a copper layer has been included in the DRC.)

Hi, cbernardo

Thanks; that’s great! I will try that later this morning.

I was hoping for something like that…as I have been designing professionally for long enough that I figure there must be a way to accomplish this. I have seen too many schematics (probably none of them were done with KiCad) which include partitioned grounds (grounds with different names that are mostly separate but are connected somewhere). It seems that any solution I have ever heard of is some sort of workaround but what you recommend sounds like the best.

This is a great forum…!

Bob

Hi, again cbernardo

I was enthusiastic about your idea and now have tried it. NO WORKY! I suspect that something is going on with the KiCad version. I am using:

(attached a screen shot which might not make it to the discussion board. My version is after May 2015)

When I try to do exactly as you say, there was a list of layers to which I could move the line. But that list did not include any of the copper layers.

Before doing that, I tried to include a graphic line in the ground bridging component. I got a warning when I made the component but said “OK; warn me; that is OK!” That worked until I set the bridging component down between my copper pour zones. The copper pour zones kept a clearance from this copper graphic line so they did not connect.

I feel like I want to “file an idea for improvement” for KiCad. If this were just my own screwball idea of something I want to do, I can understand that it would be ignored. But I am an experienced engineer, I did not start this topic in the discussion board. Star grounds and partioned grounds are an established circuit design practice. There should be a proper way to accomplish this, including nomenclature in the schematic indicating different grounds.

Bob Z

A filled region can only be assigned one net and the fill will only connect to items on that net, so naturally it won’t connect to the other pad or to the copper segment that was drawn in. In that particular case you will need to join 2 different fill zones using 2 long SMD pads which have a long copper graphic segment joining the 2 pads.

Hi, Cbernardo

OK; thanks. Maybe LOOOOONG is the operative word. I guess if the pad is long enough (adequate distance from the end of the copper segment to the outer end of the pad) then the copper pour zone will not clear away from the pad. I think the copper graphic needs to be part of the component footprint as I was not able to add it using pcbnew on the board level.

What gets me is…pcb designers have been working around this issue for years. I do not know why pcb layout software cannot include some legitimate way to accomplish something which often needs to be done. I have not heard of any pcb software properly accomodating this but I could easily be mistaken. Kind of like a modern car but they have not invented turn signals so you have to stick your arm out the window. :frowning:

Anyway I will try again.

BobZ

open.php (43 Bytes)

Hi, Cbernardo

Thanks for your patient help. I had some difficulty along the way, but your recommended solution works. I have attached a screen shot of my component interconnecting two copper zones. My pads are 0.1" high in the Y direction x 0.2" long in the X direction. The interconnecting copper graphic line is 0.08" wide, narrower than the pads so I can easily see the boundary between the copper line and the pads. You can see where the copper zones are “clearing away” from the copper graphic line. The line terminates at the inside edge of either pad but the ends of the graphic line are rounded. I should look and see if I can somehow make the line ends rectangular?

I did almost definitely encounter a software bug; the software crashed twice while I was trying to edit my interconnect component.

First I was unable to get the part to connect into the netlist on pcbnew. (It turned out that I had two components on the board with the same reference designation. I had rats display turned off. What is the best way to see that you have a duplicate component/reference designation?) Now I have gone back to the footprint editor.

My pads are 0.1" high by 0.2" wide. I am interconnecting them with a 0.08" wide copper line. I am editing this part and have my grid set to 0.002 inches. When I try to “move exactly” the copper interconnect by 0.08 or 0.09 inches in the Y direction, the software crashes. This sequence has happened twice.

After this happened I got into the footprint editor a third time. I deleted the copper graphic line and made a new line. The software placed this on a silkscreen layer. With grid set to 0.002 inches I placed the line ends, set the width, and moved it to top copper. I am not certain of the exact sequence I used, however there was no crash.

I have successfully edited and saved the part. Just to test I again tried to move the line exactly 0.09 in the Y direction; that worked and I undid that change. Then I tried to “move exactly” by 0.08 in the Y direction and the software crashed again.

But I find that this crash is not completely repeatable.

BobZ