In order to provide a DC path to ground in a radio frequency layout, I include a very narrow, quarter-wave transmission line. When I “ground” the far end of this line, all the circuitry the near end connects to is relabeled “gnd”. Then nodes that should not be grounded are filled in when zones are filled (as in prior to drc check in pcbnew). I can create exclusion zones so these pads do not get grounded, but the entire labeling system back to schematics becomes corrupted. Is there a more elegant solution to this dilemma? Still using kicad 5, which has proven golden until this arose. Thanks in advance for reading this far…
I would recommend creating your transmission line as a footprint with two pads joined by a copper polygon of the correct shape and connecting it to two different nets in eeschema.
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Designing a footprint for this seems a good option. Another option is to use net ties in the schematic to cut the netlist into sections. On the PCB net-ties have their own footprints that consists of two SMT pads connected by a bit of (graphical) copper.
V6 behaviour is unchanged for this. I use net-ties for RF structures like directional couplers
Gentlemen, thank you for your prompt help. I now have two methods to solve the problem. I am tied up with activities that have just demanded attention, but I will respond with details when I have opportunity.
After some contemplation, I decided to use net-ties. Naively, I searched the “help” documentation in vain. A general search turned up the information that they are a component. All one really needs to know. A very simple fix.
Thank you all for your help!!
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