Recollections from the old days makes me want to make vias larger than anything near the minimum mfg recommended. I’m OK making them larger, however every once and a while I get in a tight spot where I need to use a smaller than my normal via. I don’t feel comfortable going to the mfg (JPLPCB in this case) minimum.
Can folks suggest what they’ve found to be a good compromise?
Thanks
John
I try to avoid holes smaller than 15mils, with a 30mil pad.
I’ll sometimes use holes as small as 12 mils, but rarely.
IMHO, the big disadvantage with tiny vias is: it’s hard to solder a wire to them for testing.
Thanks,
You’re braver than me. Those numbers are near the mfg minimum.
In the “old days” we had to section a number of vias for every lot of PCB’s. We had a lot of marginal conditions and a few unacceptable conditions (i.e. too thin copper in via).
Hi, These are not ‘the old days’ and I have used JLCPCB for years and never changed the default via size in Kicad and have never needed too. Pucker up the courage, be brave and I promise all will be well 
I’ve been using 0.3mm holes with a 0.7mm pad for many, many years now.
My standard since 90s was 0.5mm hole in signal via and 0.7mm hole for via stitching via.
My local manufacturer absolute minimum is 0.15mm hole and 4 mils annular ring. So 0.35/0.15 via would be minimum.
I use 0.8/0.4 for signal lines and 0.3 in thermal pads. Recently I used 0.25mm vias in thermal pad.
The KiCad default of 0.8/0.4 from V4 times is far to big for SMD boards.
I find 0.6/0.3 has no yield problems with the general purpose fabs. Going finer than that is going to start costing you a premium.