Struggling with ¿solder mask?

Layout
1

Hello, I’m stuck with “some” (i don’t know if is solder mask or not) part of my component, I use that word because right now I don’t have any idea about it name.

Ok, this is my layout right now

image
image1110×798 107 KB

My problem appears at time when I try to route any chip’s pad. Of course because that line around of pad it’s too large, but I don’t know where I can modify it, I’m LOST

Thanks to much for help :grinning:

2

The thin red lines around your pads are the clearance outlines. These show the distance between different copper items which is needed to fulfil the electrical clearance requirements of your board.

The clearance values are set in the board editor → File–>Board setup. with:

  • board setup–>Design rules → Constraints (generic minimum values)
  • board setup–>Design rules → netclasses with the values for the specific net/netclass
  • board setup–>Design rules → Custom rule for advanced users who can specifically write rules for their situation

Before modifying the clearance values you should ask your pcb manufacturer (or look at their website) about the minimum clearance values they can produce. You must not use kicad with clearance values which are not producible.

3

Perfect, I didn’t found it, happy new year dude, thanks a lot :grinning:

4

Set your grid size to the smallest setting, and measure your smallest copper-copper spacing.

What is your measurement?

Please check with your PCB fabricator but I THINK that 6 mils = 0.15 mm or larger ought not be a problem.

For the sake of dirt and solder splashes, etc. I don’t want to use anything that tight if I can avoid it. But for a clean board, normal room humidity and low voltage it ought to be OK.

5

Was de clearance, thats all ok, I checked the manufacturer capabilities and all ok