(Discuss)
background
designs are getting more and more complicated. How about structural buses support in schematics. Like structural IO’s in system verilog.
scenario example
In schematics, SPI1 connected to flash 1, SPI2 connected to IO expander. Boss (or the PCB guy) says switch SPI1 and SPI2. using structural can avoid renaming all bus entries.
implementation example
define bus SPI{SCK MOSI MISO}
then define instances of SPI as SPI1 SPI2 (label)
name bus entry “SCK” “MOSI” “MISO” etc, instead of SPI1.SCK… in current KiCAD.
Current walkaround
using hierarchical ports, connect buses at upper level.