Hi all,
In Kicad 5.0.0 rc3 on linux, also in Kicad 5.0.0 on windows there are very fine lines around the pads
on the copper layer.
Did anyone noticed this display behaviour according to the attached screenshot?
This is only in the layout editor, not in the footprinteditor.
Best regards
Reiner
These denote the pad clearance.
Those lines show you the copper-to-copper clearance requirement around the pad (based on the current DRC settings). I think this is a useful feature, but there may be an option to disable it in one of the SETUP or CONFIGURATION menus if you think it clutters the display.
Dale
Thank you all for this information,
If i can disable this, that would be good,
i will test a bit now …
regards
Reiner
You can disable them via menu Preferences->Display Options->Clearance Outlines
Thank you
great
best regards
Reiner
I agree.
It seems that I remember that on one board OSH Park would not even put silkscreen if it was inside that clearance area.
In practice, silkscreen violations may be a thing of the past because board fabricators tend to remove silkscreen from any places not covered by soldermask. If you don’t pay attention to where the silkscreen legends fall this practice creates chopped-up, ratty looking, silkscreen but at least it doesn’t compromise the soldering or electrical behavior of the board.
Even so, having those clearance lines as a visual cue was useful because KiCAD’s DRC ignores silkscreen violations. (At least in ver 4.0.x. Perhaps there is some silkscreen checking in ver 5.0.)
Dale
Are you sure about that? The clearance lines in question here are electrical clearance lines, not solder mask relief lines. The electrical clearance lines are defined by your DRC settings and isn’t communicated in any way in the gerber files. i.e. if you design a board with 10mil copper-to-copper clearances and then send the gerbers to a service that has minimum 6mil copper-to-copper clearances. They won’t be checking your board for 10mil clearances (your design goal), rather will be checking for violations of 6mil clearances (their manufacturing ability). They don’t give two whits about your design goals, only if they can make the boards based on the gerbers they received.
My guess is OSHPark didn’t put silkscreen anywhere the soldermask was not applied.
It is being more common for board houses to automatically mask the silkscreen layer against the soldermask to reduce the number of customer complaints of silkscreen on solder pads. It is easier on their end to run a simple boolean operation on the gerber files than argue with customers who accidentally sent gerbers specifying silkscreen on solder pads.
No. I’d have to go back and look at my boards and my posts here on the forum to confirm/deny. I know the silk was not on copper, but may not have been on solder mask.
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