Below is my circuit in which i had ground on the bottom layer with a few signals and on the top layer all my ground went through a few vias to the bottom layer.
Someone suggested i flood the top layer with ground as well which i have done, the question is:
Do i just use the “Add free standing via option” to add the stitching vias?
Also, how frequent should they be placed? Or just around large cuts through the ground plane… For example right in the middle of the board below C4 is probably now an island of ground, will just one stitching via be enough or is there a good rule of thumb to follow here?
This circuit you are looking at is a small amp circuit, with a headphone jack powered by a TDA2882M audio amp for reference.
At the moment you do not have a “proper” GND layer, but just a lot of copper that does not do much. Both zones are cut to pieces by tracks. It’s much better to have a single proper GND pane, then two layers of patchwork and attempt to stitch it together with via’s. This looks like a very simple board (analog audio?) and layout is likely not critical, but if you want to get to know the importance of a good GND plane (in mostly high speed digital and RF design) then I recommend to watch the video’s form Rick Hartley and some from Robert Feranec (both on youtube).
Yes, but there is very little difference between “normal” and “free standing” via’s. I think the only difference is the [ ] Automatically update via nets checkbox in the via properties. I think that when that checkbox is off (for a free standing via), the via also does not get deleted when it’s orphaned by rerouting tracks with the interactive router. But I admit I’m not entirely sure about the details.
But as I wrote earlier. Start by moving all the tracks to the top (together with the pads) so you can maintain an uninterrupted GND zone on the bottom of the PCB.
Start by re-thinking positioning. For example if C1 were placed just to the left of U1 pin8 then track to C1 pin 1 will not cross with tracks from C5 and C7.
Positioning is the key. For 2 layer boards I spend on positioning may be 90% of time. During that I think about which way each connection I will do. Then routing is simply finishing the PCB.
Thanks Paul, Here is what i had before i deleted the ground vias and flooded the top layer… I think i would struggle to get a completely uninterrupted ground plane as ill need the vias for routing, unless there are some magic routes i haven’t thought of
We don’t know what have to be as is and what can be moved.
For example if you rotate CN1 by 180 you will be able to make connection to J1 shorter (to the left of C3) avoiding crossing with C5,C7 connections. But at the same time you cross two connections to VR1. But it can be uncrossed by going with one of them around VR1. And so on.
I don’t know what U1 is but I suppose that connection U1-C4 is more critical (should be shorter) then connection U1-C3.
That is a big step in the right direction, and for this PCB close to good enough. (I still don’t know what sort of PCB it is). U1 seems to be lacking a ceramic decoupling capacitor, but without schematic such things are guesswork. With “high speed” (frequency) designs relative lengths become important, but that is probably not relevant here and a bit of extra length in signal tracks is probably just fine here.
For high impedance circuits (such as for example inputs of opamps) it’s best to keep those parts of the tracks short to reduce leakage (sometimes guard rings are needed too), capacitive and inductive coupling and noise pickup.
I have a bit of a habit to use 2 vias for each GND pad, and then one of them in the direction signals are coming from or going to.
Go to: PCB Editor / Board Setup / Design Rules / Constraints / Copper to edge clearance and set it to something sensible. (0.5mm is just fine).
Copper zones should never go right to the PCB edge. This can lead to “smearing” of the copper during routing of the PCB, and especially with multi-layer PCB’s this can be a cause for shorts between layers or to the enclosure if that is from metal.
I find it really strange this got set to 0 lately. I’ve been thinking about creating a bug report for this.
That is not good. Placement of decoupling capacitors is one of the more important parts of PCB design.
And also, as this is some opamp / audio power amplifier:
With opamps, and even more so with power amplifiers, oscillations are always a concern. And apart from keeping the “high impedance” part “small”. managing GND return currents is also an issue. In the picture above each of the outputs has a snubber to dampen high frequency oscillations (stuff well above audio frequencies). If the return paths of the currents though R2, C4, R3, C5 come near the inputs then this may be a cause for instabilities. Probably its not too critical (especially when you have a full GND plane) but it’s easy to correct for it too. Also note that the datasheet of the TDA2882 has a layout example on a single sided PCB and no GND plane at all But do look at it. In both the “stereo” and the “bridged” PCB layout example these RC networks are routed far away from the inputs.
The return paths of R4 and R3 (in mine) which is the same as their R2 and R3 just about graze the edge of the inputs into the chip assuming they take a direct path on an uninterrupted ground plane.
I guess i could move that whole block of resistors capacitors further to the right, and then move C1 and U1 further left. so that it wont intersect of the way back at all…
Your time has been appreciated, i’m new to this so am very much learning by doing. Ill build this and then evaluate the results and take it from there.
What you draw is not return current. The current for these resistors come from IC output and is taken by IC from its GND and Power supply. As both (power and GND) they should be shorted (in AC sense) by blocking capacitor then the real point the current returns is this capacitor (C4 here).
The higher frequency part of return current the more it returns not the shortest way but just under the track with the current for which it is return current.
That is the task of full ground plane to let return current go back not the shortest way but the way that current prefers. Current selects the smallest impedance path and for high frequency the smaller area surrounded by current the smaller whole impedance.
Even here we have low frequency circuit if these RC circuits are to avoid high frequency oscillations (I’m not sure of it) than you should look at their circuit (with return path) as high frequency as at those frequencies the game is taking place here.
I have written;
And now it is good that C4 is closer to U1. Generally short connection to ceramic capacitor is important. Connecting to electrolytic capacitor is less important as electrolytic capacitor has high internal ESR so adding some track R is not so important.
Note: There is a connection between C7 and C8 missing. You can also flip R6 and then make the track from J1 P4 go below the other track for a simpler result. The track from J1 P2 should then go above CN2.