Stitching & Solid Vias


#1

I am dealing with a lot of current and therefore want to use stitching so I can use both the front and back of the PCB. There are some good threads on this forum and it seems that the (TI) recommended way is to use 0.3mm drill holes each separated by 1mm. This an many other solutions always use drill holes and optimized the size so solder doesn’t get ‘sucked’ in. But isn’t that exactly what you would want so more current can flow through the vias? Also is there something like a ‘solid via’ in KiCad?

Note that in my case things are a bit tight (maybe 1cm width) so I don’t want to take area away for those holes that otherwise could carry current. Then again, the holes are pretty small.

To make things easier (and not mess anything up when re-importing netlists), I would like to set a via field in schematics and have a footprint associated with it. In the footprint I would like to connect all the vias together so it only needs one connection from that ‘device’ to the copper field. However, I don’t see a way to draw tracks in the footprint editor. Is this not possible?


#2

I think there are posts in the Forum that address this - look for discussions about placing vias in the thermal pads of IC’s and transistors. Basically, you will create a footprint having a single pad. Then define the vias as thru-hole pads (not vias) with small drill holes and just enough annular ring to satisfy DRC. Then you lay one or more SMT pads completely over them. The SMT pads can be defined as long, skinny, bits of copper that for all the world like a segment from a trace, if that’s what you need. Give ALL of the pads - both the thru-hole “vias”, and the SMT “traces” - the same pad number and your problem should be solved.

Verify that your board fabricator can provide 0.3mm holes. You may have to go a little larger.

[quote=“mulu, post:1, topic:9948”]
This an many other solutions always use drill holes and optimized the size so solder doesn’t get ‘sucked’ in. But isn’t that exactly what you would want so more current can flow through the vias? Also is there something like a ‘solid via’ in KiCad? [/quote]
Do a little background reading about “open”, “plugged”, and “tented” vias. There has been a LOT of vigorous debate about this over the years. Here we see some engineers discussing the most proper way to do vias:

Some factors that affect the debate:

  • The plated walls of a via are generally adequate for carrying current. If not, add more vias in close proximity until the wall area has adequate capacity. Note: a via’s plated wall may not be as thick as the copper foils on the board surfaces. Check with your fabricator.

  • Probably the majority (but not all) PCB fabricators will supply boards with vias covered by soldermask (“tented”) by default. However, there is no guarantee that the soldermask will seal off the hole air-tight, or even to solder.

  • A via that is open under a BGA part can wick solder away from the contact balls. These vias are sometimes filled (“plugged”) with a non-conductive material similar to soldermask.

  • A via that is open under a thermal pad (of an IC, or semiconductor power package such as TO-220) but tented on the opposite side of the board, may allow the air inside the via hole to expand, and lift the IC off the pad.

  • A via filled with solder, or copper plating material, may experience thermal expansion and contraction during normal operation, that eventually shears off the connection between the via’s plated barrel and its surface pad.

Dale


#3

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