KiCad has no native way for making a square via hole (actually it also assumes the via annular ring is also circular, but I think you are talking functionally about the hole, right?). This is a fair bit outside the normal scope of KiCad - additive manufacturing has quite different constraints and capabilities to “normal” PCB manufacture.
However, you may be able to post process it so that it does work. Exactly what you need is very strongly dependent on your tooling (e.g. does it accept Gerbers or what?)
For example, you may be able to handle it by using a board with layers between each “real” layer that represent the dielectric layers (you will need to designate one as ‘dummy’, since you have n copper layers and n-1 dielectric layers, but KiCad can only handle even layer counts). Here is a 6-layer board, using blind/buried vias to connect only specific layer ranges, which is used to demo a 3-layer board with extra layers between them. Ignore the via barrel which represents the drill (which you, I think, don’t need) and focus on the annular rings:
Then, use (or abuse) the fact that all the via annular rings of the same size on the fake dielectric layers should come out as one Gerber D-code - D10 here for the 0.6mm vias I used, but that will vary:
Look in the gerber file for one of the “dielectric” layers. Via “pads” are specifically called out in Gerber files, so they’re easy to find:
%TA.AperFunction,ViaPad*%
%ADD10C,0.600000*%
%TD*%
C means a circular aperture. Change that to a 1x1mm rectangular one:
%TA.AperFunction,ViaPad*%
%ADD10R, 1.0X1.0*%
%TD*%
So, by carefully controlling your via sizes, it should be possible to insert a square conductor at each via location by replacing the apertures. You can use specific via sizes to tell your replacement process what size the square should be.
You can also make polygonal apertures in case you wanted to handle oblique-crossing tracks (not only are round vias easy to drill, but they handle that automatically!). This is a bit more complex (search keyword: Aperture Macro).
Another approach might be similar, but you post-process the KiCad PCB file itself and replace your vias with polygons of copper on intermediate layers as needed, and then plot that to your output formats:
(note there’s a gap where the “dummy” layer is - it’s up to you if you include it or not).
You might well be able to do this with a plugin like Oktizer (changing the PCB live in KiCad), but I suspect a post-process step may be easier to control precisely and will have fewer moving parts for a reproducible output pipeline for your exact use case.
