Since I upgraded to kicad 7, I can’t get the space between the filled zone and board outline to exist.
Check the copper to edge clearance value in board setup > constraints
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Thanks, that was it.
is there a value that works with most of the boards?
or a default value?
Most manufacturers recommend 0.2 - 0.3 mm.
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This without taking into account the specific component installer there are still tolerances from the distance of the component to the edge of the board and many do not take this into account
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Copper-to-edge and component-to-edge are different animals. The OP asked about copper-to-edge.
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