I created a PCB, with B.Cu filled with GND, and F.Cu filled with +3V3.
Pad 14 on one of my ICs needed a connection to GND - to that end, I created a Via underneath the IC, in a belief that I would receive a warning from DRC/List Unconnected if the fill-function wasn’t able to fill this.
Colour me surprised when the PCBs arrived and it didn’t work. I then took a closer look at how the PCB had actually been filled and noticed this island of GND which isn’t connected to anything.
Is there something wrong with my assumptions/approach, or a bug in KiCad? For me, not having to manually route all connections and letting the fill-function do the “heavy lifting” in that respect is something I really appreciate.
(So far I’ve found two instances of this on my PCB (around 70 components in total, about 30 currently soldered/validated)
Update: I had used the “Raspberry PI HAT” template to create the PCB (which is apparently a 4-layer PCB template) – while all placements and routes made by me were done only on F.Cu and B.Cu, the fill function used the fact the it had In1.Cu and In2.Cu available and created a massive ground-plane on those layers.
When I ordered the PCB, I selected “two-layer” since to my mind, I had only used 2 layers.
Once I removed the In1.Cu and In2.Cu layers in KiCad, re-filled and re-ran DRC it informed me that I had unconnected items (the very same two I had already identified).
I.e. not a KiCad bug, but PEBCAK.
[Leaving this post instead of deleting it in case it helps someone else in the future]