I am trying to export a step file of my pcb to use in mechanical cad but I am getting an error that there is not valid board outline.
PCB works fine in the 3d viewer and the board outline is displayed as expected.
No DRC errors related board outline.
I also tried using kicad stepup tool in freecad but I get an error there about “trouble with nesting brackets” and the board won’t open. Is stepup compatible with the new kicad ~6 nightly builds (nov27 is the one I’ve been using)?
I tried inspecting all edge cut line/curve intersections and I am pretty confident that they overlap at all junctions.
Here is the error I see. There isn’t any information with pcb layout coordinates where it’s running into the problem, like I’ve seen in older threads with similar export problems.
Create PCB solid model
No valid board outline.
could not create PCB solid model
** Error building STEP board model. Export aborted. **
Here is my kicad version info:
Application: KiCad PCB Editor
Version: (6.0.0-rc1-172-gb8b8c0d34c), release build
libcurl/7.64.1 SecureTransport (LibreSSL/2.8.3) zlib/1.2.11 nghttp2/1.39.2
Platform: macOS Catalina Version 10.15.7 (Build 19H1419), 64 bit, Little endian, wxMac
Date: Nov 27 2021 04:13:08
wxWidgets: 3.1.5 (wchar_t,wx containers)
Compiler: Clang 12.0.0 with C++ ABI 1002
I’m (also) looking at this PCB, and the outline does seem correct at first inspection, so time for a closer look.
I did notice something else though.
There are quite a lot of excluded errors for “Drilled holes too close together”.
These are very serious errors. An attempt to drill a hole halfway through an existing hole is very likely to break the drill. For this reason your PCB is likely to be rejected by your PCB manufacturer.
Did you make this PCB yourself, or is it (a variant of) an open source project? If so, then it would be nice if you also report this back to the designer of this project. (Edit: Just noticed the github/EricRLau text, so it’s probably yours.)
It’s also strange that the “Drilled holes too close together” violation is generated for “Deleted items”.
If I deleted all tracks and footprints, then the STEP file is generated OK, which is a strong suggestion the STEP file generation also chokes on the overlapping holes in the footprints.
I find these DRC violation messages for these “deleted items” very strange / weird.
This annoys me a lot as well. But it is how DRC currently works. If you exclude an error it stays there even if the cause is resolved, in which case it is marked (Deleted item). You have to include the error again, run a DRC and then it’s gone.
[EDIT] Btw, “deleted” here does not mean any object was literally deleted. It means the error item (the cause) is gone.
Indeed, that worked. It brought the violations back form 79 to 54.
It did not “annoy me”, I just did not understand it’s cause.
I’m not sure though if deleting these exclusions automatically would be a good idea, and that is probably the reason KiCad remembers them at the moment. Maybe a button to remove such exclusions would be a better solution. These exclusions are a new thing in KiCad, and it will probably be improved upon in the future.
But it’s quite a small thing. From what I see most of the exclusion should not have been excluded in the first place.
Thanks for taking a look everyone. I was hoping someone would say that I overlooked something simple on the board outline that I could fix quickly, ha. I’ll try a couple more things today and see if I can get it to work as expected.
On the DRC errors for overlapping drills. This is a pcb for a keyboard and these allow for different key layout options and are intentional. I’m actually not sure how they deal with it at the PCB fab but it hasn’t been an issue getting similar boards made in the past. I know if I was to try to drill overlapping holes like that at home on a drill press it would be a nightmare, ha. It seems to be very common practice in the keyboard community to have a bunch of these overlapping holes, some peoples’ boards end up looking like Swiss cheese.
I do echo the comment about the DRC tool being a little unintuitive to use at first with errors persisting after the board has been modified to correct the error. My workflow is to run DRC, see errors, close DRC window (red arrows stay), fix errors, re-run DRC to update list. It works fine but takes a while.
It looks like it was the value field for one of the keyswitches that was throwing it off. I use that field to label which keyboard key the switch corresponds to, so one of my switches was labeled with a backslash (\). I added some quotes around the value ("\") and then the stp export worked fine.
But in my copy of your project it was a backslash, and not a slash
I verified this, and created a bug report for it:
I forgot to mention that this “value” field is not meant for this purpose. It normally is the type number for IC’s, or the value for resistors and capacitors. This may lead to confusion if you have different types of switches on your keyboard, because you’ve now lost which type of switch goes where.
Oh, yeah, you’re right. The backslash is the issue. I mixed them up when I made the screenshot. I’ll go back and edit my post above since the forward slash isn’t actually a problem like the screenshot implies currently.
Good note. I’ll add a new label field for this in my project and use the value field for the actual switch type. I’m on a never-ending journey to figure out best practices for ECAD so these types of tips are helpful.