I have read up on busses, and used them in several non-trivial boards now, but I still don’t really understand them. For a typical hierarchical project, where I make the top level a sort of block diagram, I can make busses work, but I get erc errors. I have used the BUS[0…] format, though this has few applications for me, so I mostly use BUS{SIG1 SIG2 NUTHERSIG} format which lets me give decent names to nets of say an spi bus. Somewhere I read that I can use SIG{X} for the entry/exits on sheets, which really cleaned up the schematic. I use the full bus name label on the bus and shrink it to tiny text since it is visual clutter to me. I can get the schematic to look clean, and the nets to propagate to the pcb for layout, and get my work done, but the erc errors tell me I am likely doing it the wrong way. I will try uploading a couple of snips (I am new to this forum – hope this works)
So this is a snip of the top level sheet. There is a sheet that outputs a SENSORS{X} bus, and I feed the bus into another sheet:
This is the source of the bus on the first sheet (the tiny label on the bus is the full definition SENSORS{CH0 CH1 CH2 CH3 CH4}). The erc error says “Both SENSORS{CH0 CH1 CH2 CH3 CH4} and SENSORS{X} are attached to same items; SENSORS{CH0 CH1 CH2 CH3 CH4} will be used in the netlist.” I can live with that as a warning for the sake of a simpler schematic:
This sheet uses the bus as input. Same message as above for the SENSORS{X} input, but each net has “Label not connecting to anything” error which I read may be a bug ??? I highlighted one of the nets and it connects properly. Again, I use a tiny (since I consider it visual clutter) label on the bus with the full definition SENSORS{CH0 CH1 CH2 CH3 CH4}:
So is the BUS{X} name a problem? I like it being succint, and I shrink the full bus labels to keep things looking better (maybe that can just be hidden). If I have to use full bus names on all sheet entry/exit points and the top level, things will get messy for no added benefit.
In Schematic Editor / Tools / Bus Definitions you can enter aliases for bus names to shorten them. I have not used these myself and can’t comment much. I recommend you read KiCad’s user manual before attempting to use them.
I didn’t know there was such a thing as a Bus-Def dialog for creating a bus with an alias. I also don’t see the difference between this being an alias or just a bus name.
I have a finished project that has eight sheets and ten buses already defined. I just built the buses with the drawing and label tools, and they traverse the hierarchy and I can route just fine.
When I open the Bus-Def dialog (on the root or any page) it is empty and sees none of the buses I have drawn. I can define a bus there easy enough but then how is it accessed? Looks like a nice formal way to set up a bus, so I read the docs but I still don’t understand how this bus alias dialog mechanism works.
But I have a working project without bus aliases, albeit with some predictable and ignorable erc errors, so I guess I can’t complain. Hmm, still a bit of mystery. I am clearly missing something.
You can define X to be a list of signals in the bus aliases dialog. If they then match the signals on the actual bus, the ERC issues all go away. It lets you define your buses once and use them all over without having to put in the signal list all the time. For example, I have an HDMI bus definition with all the high-speed diffpairs and low-speed signals, and I can route a busname{HDMI} between things and ERC is happy. Then I can right-click the bus and unfold any signal I want from it, so I never have to type in the individual signal names anymore. It’s great. In your case, just put the full signal name list into a definition for your abbreviation and ERC will be happy and actually check if you did the right thing.
Ahh, the alias is not for the bus name, it’s for the members. That makes sense and worked for me. I defined alias CH to be CH0 CH1 etc, and then used hier pin name SENSOR{CH}, which is nice and short (and better than {X}) and then I can remove the bus label that was annoying (which I previously made tiny) – much clearer and cleaner and the erc error about conflicting labels is gone. There are still erc errs on bus nets (label not connected to anything) but that is a different issue and I thought I read that it was a reported bug.
thanks @kliment!
What is odd about the “label not connected to anything” erc error is that is does not show up on all bus nets. Here (after using Bus-Def to alias members) I get errors at one end of the bus and not at the other end on a different sheet (and no errors on the root schem where it is piped between sheets):
Since I think I read that the erc “label not connected to anything” error was fixed on win, I should point out that I am at 6.09 on linux. I just get updated whenever pop-os tells me there is an update available.
These errs are different from my fundamental bus confusion that I understand now – I am unsure how to edit the title of this to add [Solved]. Thanks all. Need to get this off to fab…
There have been a bunch of "label does not connect to anything issues on gitlab and a recently closed one is #12814 and this probably means it will be fixed again in V6.0.10 (please add the extra dot).
However, the amount of bugs related to that suggests there is some dirty code underneath, And a bit later this seemed to be confirmed by the title of this commit:
If you scroll up, there is a pencil next to the title. Click on the pencil to edit the title.
I also see squares on your bus exit points. I guess you just drew wires there instead of using “real” bus entries.
Using slanted wires or bus entries does not matter much.
Before KiCad V6 the bus was visual only and KiCad relied solely on the wire labels to recognize connections.
Those boxes indicate open wire ends, and to me they are always an indication of possible faults, and a while you will probably also recognize them for that. But in themselves they are no direct faults.
A possible problem with using wires for this, if that if you have connections on both the right and left side of a bus, then the wires will connect them together, while the bus entry symbols will not.
Gotcha. Though I have not broken a bus on both sides, I can see it being handy at some point, and the “kinda-hidden” connection of two nets would be a head-scratcher. Thx for all your help.
