Heh. The rule name can be anything. But it’s better be something descriptive when you see it in a DRC error or in Inspect → Clearance resolution.
BTW, next you will wonder what’s the thing with A and B. They can be anything and they don’t have to be descriptive. They are just ad hoc “placeholders” inside each condition. There are always two parties in clearance resolution. A and B are used as temporary names so that you can write a rule where the first and the second item are tested for specific properties.
Ha. I usually use pud for temporary name. When someone asks I say program under development, but it is just pud, and I always know I can throw away any pudxxx files or directories or whatnot.
Hey, a great big thanks to everyone for all the help – what a great forum!
there is a danger: it allows anything to touch the graphic line, including a third net. In this case it’s hardly dangerous, but you should add more exact tests in the condition if you want to be sure.
I don’t want to drag this out too far but I got my last couple of parts tweaked to work easily with no drc errs. @eelik thanks for enlightening me on rules. Looks like there is incredible flexibility available when using them correctly. For my plane bonding jumper I wanted a way to just set it and forget it, and when you mentioned that thru-holes have copper on all layers, I just added a center pad. Tried with no hole but kicad grumbled, so three holes it is. Reminds me of lego robotics days with my son. Ties all layers nicely:
The soic/vssop combo took a bit more work as I had to build it with smd pads and PTH holes, removing mask and paste from them all, and numbering everything correctly. I even left room for optionally adding a stitch via in the center for a little ground to flow.
