Solderpaste for DNP

Hey People :slight_smile:
Im about to send off a board to production, but it has quite a few DNP components.I would like to avoid getting solder paste on some of these, but can’t find a good way to avoid it. What way would you suggest which would provide the least amount of manual work?

Thx :slight_smile:

For what reasons do you want to do this? Is the part to be hand-populated later? I have one hand-soldered part, but I also have several “address assignment resistors” that need to be DNP depending upon the intended “address” of the individual board.

I think, for the resistors, I’ll just leave the solder on the pads, and reflow it onto the board without a part.

I think for the hand-soldered part, I will eliminate the solder paste entirely.

You can change the “Solder paste ratio clearance” on every part to “-50%” and that will remove the paste from the pads.

This means you’ll have different stencils, depending on whether parts are stuffed or not. That seems expensive-ish.

When the boards go through the oven with paste on pads but no parts in those locations, the paste just melts and you get a little solder bump on the pads. Nothing really wrong with that.


If you really need to avoid having solder on these areas you need to discuss your options with your assembler but this can often be accomplished by applying a peelable solder mask.


For prototypes and small batches where we used a manual stencil printer, we covered the DNP part’s stencil cutouts with simple adhesive tape on the top side of the stencil.


That would be frowned upon by most assemblers as it tends to scratch the squeegee.

That’s why I stated that we used it for prototypes and small batches on the manual printer (i.e. hand.held squegee in our case). It usually took 2-3 test runs to get a feeling how to “modulate” the pressure of the squegee on the places with the adhesive tape, but then we got good results.

And the assembler was the same guy as the designer, layouter and quality inspector: Me :wink:


I wouldnt follow the above hint, that spare paste will melt and thats it. Solder paste can create conductivity leading to a short. Better just delete the DNP pads from your SMD-Stencil data or tell your boardhouse to do so.

OK, I get this week’s prize for thread necromancy. But I’m facing the same problem, and this thread never reached any conclusions. We’re sending a board out for contract manufacturing (CM), and it has a handful of DNP parts. Most of them will be manually populated later.

In our case , it’s the CM who doesn’t want to apply paste to pads that will not receive a part.

That is my preference. That “bump” contains about the correct amount of solder to make the joint, when a component is eventually soldered onto that location. Makes the manual operation easier, and less likely to have too much or too little solder on the joint. The CM, obviously, has a different opinion.

Stencils aren’t as expensive as they once were, but they aren’t no-cost items, either. At some point I expect we’ll want a batch of these boards assembled with some of the DNP parts in-place. Then there will be the problem of two (or more) different stencils, and the associated configuration control problems.

But so far, the discussion doesn’t give a preferred method for omitting certain apertures from the paste stencil.

Yeah, but how? (Our CM won’t take responsibility for human interaction with the files we send him. No editing; no alterations; no adjustments; just feed the files into his machine and press “GO”.)

That’s one method. Edit the affected footprints in PCBNew to change the paste parameters.
I think there are other ways to accomplish this:

  • Set the “Solder paste clearance” to a value greater than half the pad’s dimension. (E.g., set it to -0.038" for a 0.065x0.075 pad.) (The “Solder paste ratio” seems to be a more elegant solution, since you don’t have to find the actual pad size, nor do any arithmetic to determine the value.)

  • Create an alternate footprint which omits the paste layer from all the pads. In EESchema, assign this alternate footprint to the DNP parts.

  • I looked for a way to create a “Keep-out zone” on the Paste layer, but couldn’t find a way to do that. If that capability is there, it offers another approach to the problem.

What are your thoughts? Is there a consensus on the best solution to this problem?


The real solution would be support for different “board variants”, but KiCad has no support for that (yet).

The quickest way to swap between different sets, is to put all footprints that can change together in a library, and then have two variants of that library. Call them “Lib_A” and “Lib_B”.

In the schematic you then make references to a third library, call it “lib_Used”.
Then, depending on whether you want variant “Lib_A” or “Lib_B”, you copy either of them to “Lib_Used”, and then update the footprints on the PCB.

Managing different versions of very similar PCB’s can be confusing, and therefore I recommend to add some extra tricks such as a footprint with just a text string which clarifies which variant it is, or a resistor that changes in value and can be measured by automated test equipment or a microcontroller on the PCB itself.

This would be a really good way to get an incorrect stencil on a later project.

In my opinion it is best to just alter each DNP footprint on board file manually. Also, add some text, maybe “DNP”, on a fab layer to identify that the footprint is not standard.

I never haven’t such need. I think how I would do it in my old Protel 3 (from 1997).
There I would define component class and add all DNP components to that class, and then in Design rules - Manufacturing I would add one rule in ‘Paste Mask Expansion’ section telling that for that class that expansion should be -100mils (or more if there are bigger pads).

Didn’t checked it but - can’t you just use any enough big value to get less then 0 size?

For what it is worth, my company uses “DNP” for unpopulated parts that will not have solder paste applied, and “EMPTY” for unpopulated parts that do get solder applied. Our CM also makes our stencils, and we do this at their request.

Why do we bother? We make hardware development boards that can be further modified or added to by customers. Sometime aspects of operation can be modified by adding resistors, or we have variants with different parts populated, and these get solder. Some aspects of operation require other components to be added by the end user, and we do not put solder on these because the amount and type of solder is often different from standard paste.


The more I think about this, the more I realize that it convolves the board layout process, with the configuration control process, and the MRP process. There’s just no easy answer, nor simple solution.

I altered the board file (in PCBNew). I changed the “Solder paste ratio clearance” for every affected footprint to “-50%”, and also added “DNP” as a text item on the Fab layer of every affected footprint. In my “Revision History” notes, I mentioned the parts (by Ref Des) that were configured for “No solder paste”, but didn’t go into the details of how it was done. These actions should result in a board with the desired characteristics.

But . . . . aside from the “Revision History” note, there is no record of the changes , and no audit trail. There is nothing in the schematic file pointing to these changes. Each of the affected parts calls out its standard footprint. The next designer to pick up this board and update the footprints will get paste on places where it isn’t wanted. Or, he’ll get a paste stencil that’s missing some apertures and wonder how that happened. (And those are likely scenarios even if the “next designer” is ME. But I just turned 70, and don’t intend to be working here much longer.) Even the “DNP” notation on the Fab layer is easily overlooked, since I rarely display that layer while I’m working on a board.


“Component Classes” - now there’s an idea worth exploring! Sort of like we have “Net Classes” for Design Rules, but broader in scope. It should allow us to accommodate several situations beyond what we’re discussing here:

  • Standard parts that will not be populated, do not get solder paste, appear on a “Master BOM” but not on a “Manufacturing BOM”.

  • Standard parts that will not be populated, DO get solder paste, don’t appear on either the “Master BOM” or the “Manufacturing BOM”. (I.e., parts that my be installed by an end-user.) They may, or may not, appear on a schematic.

  • Footprints - like mounting holes, or mounting hole patterns - that appear on the board but not the schematic.

  • Parts - like a trace antenna, or a fuse-trace, that appear on the schematic, and have a footprint, but no physical part in any BOM.

  • Notation fields - like Part Number or Rev Level - that appear in copper and are linked to some other database field.

  • Logos, copyright notices, etc, that show up on every board but never appear in any documentation.

Perhaps some value like “-999”, or “-127”. I would be afraid of triggering some kind of “Value out of range”, or “Arithmetic overflow” error in the software. Perhaps not now, but at a future time. I still think the approach from @Sprig is the best way to go, if I’m going to manually edit footprints on the board:

But I am still not entirely comfortable with doing manual edits to the board like this, because they are hidden from view and don’t have any traceability.



That is a subtle, yet significant, distinction worth having.

Where is the “EMPTY” or “DNP” information recorded? Is there a menu where you can check (e.g.) the “DNP” box and the software will automagically remove that footprint from the paste stencil? Or is it up to the designer to manually remove the stencil apertures, then manually edit the BOM version that goes to the CM (but not the BOM version maintained internally)?

Another factor that hasn’t been mentioned in this thread, is protection of trade secrets or intellectual property. You may want the CM to assemble your boards, but you don’t trust him with the firmware ROM. Or your design relies on a super-duper, high-performance, next-generation component that you secretly developed in an obscure lab, and you don’t want to risk the CM figuring out exactly what that part is capable of.


Rename the Project file as both Project_Stencil_DNP_Date/Time_Code, or Project_Stencil_EMPTY_Date/Time_Code.

Personally, my opinion, is to just to use -50% reduction on each affected footprint; or even use -77% if such value doesn’t muck up the inner workings of KiCad.Then document the changes on both the schematic and the PCB layout under the same number/dated text note .

As a company, we are still using Altium, but looking hard at KiCad 6. We use one of the fields in the component, maybe the “Comment” field IIRC: if blank, the part is treated normally, otherwise we specify either DNP or EMPTY. This field is output in the BOM where the CM decides what to do.

This was requested by our first CM, because they would make their own stencils. We took on a second CM, and they also serve as a second source for PCB fab. They had no trouble adopting this practice - it seems like a common request to them and they were already set up to do it when we asked.

I don’t know if this it typical. We are a small company, and in my prior experience at big companies, I never had to think about these things…