I think you meant under.
What board fab house did you send your files to, and what is their recommended minimum mask width?
FIrst, ensure for certain that you understand what you are looking at. The soldermask layer in PcbNew shows where soldermask will not be applied; it is an inverted layer. When the 3D viewer is used, the image should show the soldermask with varying “holes” in it.
At this point, a screen shot of your perceived issue would really help clarify the problem that you are actually having.
What is shown on the mask layer in PCBNew as @Sprig pointed out is the inverted layer of soldermask (where it isn’t).
I verified on Kicad 5.0.1 that the mask layer does not automatically add graphics to cover the places that would be excluded due to minimum mask width which I believe is what you are asking for. Without this, it the final mask layer is not shown in any preview (2D or 3D) and is only visible in the gerber plots.
The picture in your head may be something like a polygon pour, where the soldermask would reflect the minimum width and spacing with every update. Unfortunately, this is not the case, while pads are updated in real time with the clearance value, the minimum spacing rule is not applied in the preview.
No, I definitely mean over.
The values I have found so far for the minimum mask width are: 2 mil, 3 mil, 4 mil and 0.1 mm.
4 mil / 0.1 mm seem to be the most common, I have found these at Oshpark, SeeedStudio, Pcbway, Adafruit and it’s the Eagle default.
@crasic Thank you very much for confirming my observation.
And yes, you are spot on. A graphical piece of information representing the minimum mask width was exactly what I was expecting.
Which leaves me with one confusing point.
The minimum mask width is presented as a Kicad setting. Similar to it’s neighbor Solder mask clearance (Kicad 5!). Which is why I expected it to show up in the designer or viewer in the first place.
However it’s seems more commonly being treated as a fab house dependent DRC value. In which case I would expect a DRC error or warning.
Neither happens.
So if this is not a bug and by design, I would very much like to learn the rationale behind this.
For almost all boards, a mask expansion of 0 works perfectly fine.
The 3D viewer is not meant to be the final check of the board design; the Gerber files are.
Set the Pads to Mask clearance to zero, the width to 0.004", and the boards you recieve from OSHPark will look exactly like the 3D viewer (assuming of course that you change the soldermask color to purple!).
100µm = 0.1 mm = about 4 mils, not 6. Tonn said it’s the most common value and couldn’t find values over it. 6 would be over 4, but 100µm is 4 mils. However, for color other than green PCBWay has the minimum value of 150µm which is about 6 mils, is that what you meant?
The gerber files are used as a check tool as these are typically the files you send to your manufacturer. If you send them the kicad files directly then you need to hope that they use the same export settings as you did when you made your checks. (This is why i personally would never ever send anything else than gerber.) You also need to hope that they have the same version of KiCad as you do.
Additionally: if you set the mask clearance to 0 you will not get the board back as shown in the gerbers. The board house will adjust the clearance to their value. (a good board house will ask you what to do -> Will take time but at least you get feedback.)
In such a case it could happen that the gerber looks like you have enough space for solder mask between two features. After increasing the clearance to fit the manufacturing requirements the minimum width settings might already be violated. (Resulting in no solder mask between these features)
I personally would not go down that route. I always carefully read the manufacturers documentation and setup kicad to fit their restrictions. (In most cases i don’t go to the limit if i can avoid it.)
Maximum soldermask expansion, retraction, or shift is 3mil (0.0762mm).
This means they only guarantee your pad to be non solder mask defined if you leave a clearance of 3mil. I therefore see two options of what will happen if you send a board with 0 clearance:
Option 1: They add their clearance without ever telling you. (Might be the reason why you state that it “works”)
Option 2: They manufacture it as given. Some pads might be covered with solder mask. See below for more details (It might not affect your manufacturing process. This might be why you would state it “works” in your case.)
Analysing option 2:
Lets simplify the oshpark definition and assume all the error comes from a misalignment of 3mil between copper and mask.
For further simplification lets assume the alignment issue means the soldermask is moved to the right by the full 3 mil.
So if you had your soldermask beginning exactly at the left edge of a pad then you will get it with 3 mil covered on the left side and 3 mil free on the right. (In reality this will be a bit different as you will never have alignment alone nor exactly in one of the orthogonal directions.)
For handsoldering this is probably ok. This is because you normally already have much larger pads than strictly necessary. For reflow soldering one might not be able to live with such a discrepancy. (Especially not in high volume production where you want tight control over all of your parameters to increase yield and therefore your profit margin.)
My definition of “getting something as designed” would mean that the obove listed option 1 is definetly wrong. Option 2 can be considered within specs if i assumed this to be the case during footprint design. Otherwise it is definetly the fault of the guy setting up the design tool parameters. (The board house did what they where told.)
Specifically, based on my experience this is atypical. Most MFG will spec something called “soldermask swell” which is an expansion of the epoxy layer after curing, which is on the order of a few mils. And you take that into account in your clearances.
What this actually means in practice is that OSHPark is adjusting the Soldermask back a few mils to achieve the exact clearance specified in the gerber. Which is to @Rene_Poschl point that they are adjusting the pullback for you. Which may be desirable in some settings (like small run prototypes)
In some software soldermask clearance (used to define SMD/NSMD pad) is different parameter from soldermask pullback (used to account for soldermask swell).
P.S. a good mfg will try to do a cursory Design for Manufacturing review and identify problematic areas, I have been asked before if it was OK to add additional clearance to a pad they were concerned would get covered by soldermask. Because I know fabs do this regularly is why I suspect OSHPark is doing this as well
And, why would I not expect any Fab house to do this?
To your point, I did go down to the local hardware store and asked to have a 2x6 cut down several times. The adult idiot hired by the store never took into account the thickness of the blade; which is something I learned when I was 12 years old.
I also recently went to a company to have a template made by being laser cut out of acrylic. I specified the final hole size that I wanted, and they had no problem accounting for the small diameter of the laser beam to get the final cut the specified size.
The problem that I have is that I understand SMD/NSMD pads. Also, the fact that unless the normal/default clearance is set to zero, then how will the Fab house understand what you want if the design requires both?
I am going to continue to specify zero mask clearance until I find a Fab house that can do everything else right for the best price, and it is the only issue they can’t fix on their end.
The ultimate suggestion is to use an Engineering Drawing that calls out these features and explains your design convention. Putting the burden on the supplier to match what you are getting from OSHPark . For example, you can include a statement such as “All Soldermask Clearance for pads specified nominally, add sufficient clearance to guarantee NSMD Pad after expansion for SMT pads”, If you have a small number of SMD features you can literally point to them individually in the drawing, or you can include a small negative clearance to indicate your preference.
Having an engineering drawing, will at the very least, force the manufacturer to reach out to you with questions about your intent. But it also gives you an explicit place to state your design convention, using words to communicate that which is limited by the gerber format (More on that later)
Well , in principle I agree with you, but there is a “soft” industry standard/convention for soldermask dimensions, just like in machining there are certain conventions. Either way works, but mismatched conventions can cause confusion, so explicitly stating your need in a drawing is a good way to make sure everyone is on the same page (or you wait until prototypes and complain to the fab!)
Now part of this comes in some part due to the gerber format itself. Which is a plotting format that originally was directly used by the tooling, and does not carry any CAD data with it. So the burden was on EDA and the designer to take into account the process limitations. Now-a-days the fabs tweak and tune the gerbers more easily and do this for convenience of customer more often
Many manufactrurers are shifting from plotter assets to using the actual CAD data, the industry standard for this is ODB++ which includes real data for soldermask clearance and pullback, but some will also accept native formats like kicad or eagle files. Less common among PCB only mfg’s but certainly the new standard for PCBA.
A lesson learned hard way: always tell the manufacturer explicitly what you want unless you follow their predescribed rules. Because some summer holiday student worker (or some senior engineer) may think you have made a mistake and change SMD to NSMD. No matter what you believe is possible or whether the manufacturer is big and old or small and new company.
Good point, Which just reinforces my overall suggestion.
Instead of assuming, one should provide an engineering drawing where you can explain this stuff in words and sentences. Then you can expect exactly what you ask for. Creative use of the User and Documentation layers can let you create this directly from PCBNew but sometimes this is done in an external drafting program.
That goes against the currently fashionable practice of “user friendly” web pages where you simply clicky-clicky on a few menu choices and upload a pile of Gerber files.
Perhaps the problem will go away if there is ever an agreement on a replacement for the Gerber file format. (Except for incorporating the “aperture file” into the data files, it hasn’t changed much since the 1960’s when it was created to control mechanical photoplotters in the printing industry!) In the meantime, perhaps you could try telling the board vendor to build exactly as shown in the *.TSM and *.BSM files . . . . except that is essentially creating an Engineering Drawing!
Dale
P.S. - Almost half a century ago, the instructor in my university “Technical Communications” class (required of all Engineering students) said that we would be making, changing, or reviewing drawings as long as we were doing engineering. I didn’t believe him. I figured that, as an electrical engineer, I’d easily get along with nothing more than sketches of schematics. I wish I had paid closer attention in that class . . . .