I have a very small footprint and I’m having issues with the solder mask being smaller than the pad. Is there a way to fix that?
Texas_RWH0032A_ThermalVias.kicad_mod (10.5 KB)
Please give more information. KiCad version? What footprint - self made, aqcuired somewhere, in KiCad standard library? Can you give the footprint file here? Are you aware of the clearances in the footprint properties and in the properties of each pad? Are the copper pads defined with the mask layer on, or is the mask in independent pads?
The footprint you use might be designed to use solder mask defined (SMD) pads.
If soldermask is bigger than you have non solder mask defined pads (NSMD).
Note that here SMD does not refer to surface mount device.
SMD pads can be used to get maximum copper size while still having enough space for solder mask between pads (solder mask min width)
Reason:
If solder mask ends too near to a height step you get increased delamination probability. So you need a clearance between the copper (pad) edge and the solder mask cutout edge. Either towards the outside or inside of the pad (NSMD or SMD).
Thanks for getting back to me, heres the info you requested:
Version: (5.1.0)-1, release build
Footprint is from the kicad standard library: Package_DFN_QFN:Texas_RWH0032A_ThermalVias
Since I didn’t create the footprint im unsure how to answer the other questions. I attached the footprint to the original post.
We reduced solder mask min with to almost nothing for testing, that didnt resolve the issue.
You misunderstood. Soldermask min with requirements is one of the reason why this footprint is designed that way. (Why one would choose SMD pads) Changing it will not change how the footprint is designed!
And the reason why the footprint is made this way is because TI suggest it http://www.ti.com/lit/ds/symlink/lmg3410r070.pdf#page=29 (See note “Soldermask defined (preferred)” on the bottom of the page)
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That makes sense, thank you for explaining!
As a side note, nowadays TI seems to tend to recommend solder mask defined footprints for parts with small pads. See for example http://www.ti.com/lit/ug/slra003d/slra003d.pdf. We had non-smd footprints for F4YJC and it caused problems. I created solder mask defined footprints which have worked better.
With current board manufacturing technology solder mask seems to be more accurate than copper etching, apart from the registration error (location in x and y axis). Registration error is problem for those small pads with small pitch. It’s necessary to stretch the limits of cheap manufacturers a bit and to take some risk, and anything smaller would require considerably bigger cost, I think.
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I sow SMD pads only with bottom exposed pad till now.
With the pads in this example (raster 0.65) I see only advantage of SMD over NSMD in bigger cooper areas = part is kept stronger by PCB and may be heat goes faster from part to PCB.
I supposed that may be SMD allows to solve the problem of too thin solder mask betwean pads when raster is really small (like 0.4mm).
To simplify assume it is 16 mils raster. We made 8 mils pads and clearance betwean them 8 mils. I have read that standard solder mask extension should be 4 mils. I am since always using 3 mils. So if I use 3 mils then I left 2 mils solder betwean pads. My manufacturer specifies that 3 mils is minimum (too thin solder can be broken during technology processes and landing in another places of PCB can damage it there).
But if I try to use SMD and I have the same distance betwean copper edge and solder mask edge I have to extend copper pads by 3 mils and I end with clearance of 2mils!
So SMD don’t helps in the situation when problem with solder mask is real.
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