I am using a SOIC device with a small pad underneath which needs to be soldered for heat sinking purposes.
I haven’t been able to find a way to clear a solder mask area on both the front and back sides of the board and add vias so I can manually solder.
If you need solder mask front and back, use a through-hole pad set to square. The drill provides a central via. You can add further THT pads as stitching vias. You can create multiple adjoining or overlapping pads as required to achieve most shapes.
As @bobc already informed you, this is best done via a specialized footprint. As inspiration have a look at any _ThermalVias footprint in the official library.
The workflow by @bobc works, but it is a bit inflexible and requires math (=error prone)
The way we do it in the official lib is as follows:
We place a smd pad on front and back of the required sizes. (both have the same pad number) The front one has mask activated while the back one does not. (If users need the back side free of mask they can activate the mask layer from inside pcb_new or copy the footprint into their lib and modify the back pad there.)
If a mask area of a specific size is required we do not activate the mask of the large copper pad(s) but we add another pad that has no pin number, no copper layer and only mask activated. (This is done where the mask cutout is dimensioned in the datasheet. Or if the clearance in x and y direction are different.)
For the vias we then place through hole pads with the required drill size. The copper size is set up such that they fulfill the minimum annular ring requirements. These have no mask enabled as the mask is controlled by the other pads. They have the same pin number assigned as the large copper pads.
If you want your board to be assembled automatically you also need to take care of the paste layer. For the best result it is recommended to split up the paste layer into multiple smaller pads. (This does reduce the amount of paste without needing thickness reduced stencils. It also allows a way for gases to escape.)
One should aim for a paste coverage of 50% to 70%.
As you have vias in the footprint you might want to create your paste layer such that it avoids the vias. This does reduce the chance that vias wick away solder. (Otherwise you might want to tend the vias at least on the bottom side. Or you could request for them being plugged which will add extra production cost)
The paste pads have no copper enabled, no mask and no pin number.
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Thanks @bobc and @Rene_Poschi for your prompt replies!. I am about to go away for a few days but am keen to have a go at this on my return. I will let you know how it goes.
I don’t know how appropriate it is for this application, but you can force the solder mask to be cleared with a filled zone in the solder mask layer. That is, on the solder mask layer, filled zones act like a photographic negative—they clear the filled region.
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Thanks @cflin; I am back from a short holiday and will spend the rest of Sunday playing with this. Your suggestion appears to work but I can’t find a way to visualise it. I defined the filled zone in the Front Mask and received no errors but once run DRC an redraw, nothing shows.
Welcome.
I, too, have been having problems with displaying the fill in filled zones. (I am running KiCAD4.0.7 on Ubuntu16.04.3LTS, which KiCAD mysteriously reads as Ubuntu16.04.1.) If KiCAD refuses to show the fill of a zone, I’ve found out that switching to the legacy (‘default’) viewer works—the fills always show up. I am not sure why. That includes “filled” zones in the solder mask layer.
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