SMD test point causes openings in filled zones in all layers

Using KiCad 6.0.7 here. I’m using SMD test points from the KiCad library: ‘TestPoint_Pad_D1.0mm’ on the bottom layer of a 4-layer board. I have filled zones on all 4 layers. All filled zones from all other layers than the bottom layer (where the test point footprints are) get circular openings at the position of the test points.

Can’t figure out what could possibly cause this. Doesn’t seem to happen with other kinds of SMD footprints. I have tried creating my own test point footprint with 1 circular pad, and it does the exact same thing.

The odd thing is that if I manually add one such footprint on the PCB (Place/Add footprint), this one doesn’t have this issue. So it appears to happen only for footprints that have been imported from the schematic. Pretty annoying.

EDIT: OK guys, I found out what the culprit was. It’s not related to footprints actually. Turns out that I imported a DXF file for the Edge.Cuts layer. When viewing this DXF file in a CAD software, I never saw anything in it other than the board outline and mounting holes. But in fact there was the test point locations in it, only as dots (that are not viewable) and that KiCad imported as is. They didn’t show either in the Edge.cuts layer, but they were there hiding… And they got imported as 1µm holes. While this didn’t appear at all on the Edge.cuts layer, it triggered clearance around those tiny holes on all layers. Since I had placed all test points at those exact locations, I thought the test points were the culprit. But I eventually found this out when I removed all test points and regenerated the filled zones… then I finally opened the kicad_pcb file in a text editor and noticed there were tiny circles on the Edge.Cuts layer (1µm diameter). Checked the DXF file also in text editor… and confirmed. And then I removed them all manually. Great thing KiCad file format is in pure text, s-expressions! Would probably never have found out what the issue was otherwise.

That may be worth looking at the DXF import and probably reject features that are too small, or at least give a warning. This one was tough!

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