SMD PCB Modules Kicad tutorial?


I’m currently working on making a solderable smd module that can be soldered to other pcb’s and may be attached with headers if the user’d want that.

Any how when I put an edge but in the middle of the solderable via pads of the pcb the editor wont let me rout to those pads sins the “middle drill hole” is in the copper keepout area of the board so copper pour wont flow there as well.

Here’s an example of the kind of board I’m trying to deign:


How may it be done properly?
Side question that probably isn’t wont a post is what is the proper way to create a 2 floor pcb incase of where to put that design and how to export them in two separate PCB’s for the manufacturer?

Thanks for helping.

The link is weird and can’t be opened (Windows, Firefox).

I think it is not a true link but somehow the picture is encoded in base 64. Which is quite dangerous and firefox is in the right to do nothing with it.

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Same here.
The URL posted is extremely long (12Kb of text) and seems to have an inline jpeg image encoded in base64 format.
It’s also got:


I also seem to recall that URL’s have an official limit of 2048 characters…

Fixed it just pasted the image.

It’s “castellated edge” or holes or castellation.

The holes are pads in a footprint. You shouldn’t use vias for that. Create a footprint or several footprints which have the holes and their copper pads. Place the footprint so that the middle points of the holes are on the center of the edge cut.


Might also be worth discussing with your proposed fab too - castellations are not available with some of the cheapest services.


Ok interesting could you just show me the setting of the pads? I see there you used a hybrid of a drill and front back pads but when I do it with THT and put the center of the drill on the edge cuts it doesn’t let me route a wire to the pad and shows me this error:

Thanks for the help.

That happens because the center of the pad is on the edge line. I have three different pads in one: hole, top SMD, bottom SMD. The track goes only to the SMD pads, not to the hole.

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(module Castellated_1 (layer F.Cu) (tedit 5AD72F4C)
  (fp_text reference REF** (at -0.05 2) (layer F.SilkS)
    (effects (font (size 1 1) (thickness 0.15)))
  (fp_text value Castellated_1_0.6mmHole (at 0.05 -1.4) (layer F.Fab)
    (effects (font (size 1 1) (thickness 0.15)))
  (pad 1 thru_hole circle (at 0 0) (size 0.6001 0.6001) (drill 0.6) (layers *.Cu)
    (clearance 0.001))
  (pad 1 smd rect (at 0 0.225) (size 1 0.45) (layers F.Cu F.Mask))
  (pad 1 smd rect (at 0.002508 0.37373) (size 1 0.75) (layers B.Cu B.Mask))
  (pad 1 smd roundrect (at 0 0.44958) (size 1 0.2) (layers F.Cu F.Mask)(roundrect_rratio 0.5))

This should work, although I vaguely remember having some problems with routing or DRC, but at least I have these in some boards which pass DRC. I was overly pedantic with the copper area: it doesn’t exceed the board outline at all, except for the round hole which has even some extra copper (I don’t remember exactly why).

The trick of routing to the pad, instead of from it (mentioned on launchpad) does not longer work (KiCad V5.1.0 here), probably because the edges of the PCB are better detected for DRC errors.
(Remark: For DRC checking, the edges of a PCB are like tracks, they have a width and a clearance).

As a (temporary) workaround:
You can disable DRC checking:

Pcbnew / Route / Interactive Router Settings…

  • Turn on “Highlight collisions”
  • Turn on “Allow DRC violations”

This does list your castellations as errors when doing a full DRC check later. If you can not live with that, the best solution is probably to make custom footprints with long pads or custom graphics. (For example have a look at the net-tie footprints).

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One trick which may help: set the pad’s “Shape offset”. The center point which is used in routing can be farther from the edge line.

I just noticed that I had used zone in one place instead of track. In some cases that may help.

Will that really help? I thought the center of the drill of THT pads conforms to the connection point that is moved using shape offset. And for castellated pads you really want the center of the THT hole to be coincident with the board edge.

Oh, that will help for your combined pad of two SMT pads and one THT pad. The connection point for the SMT pads can be moved further from the center of the THT hole. Then for thick traces, one could get the end of the thick trace close to the SMT pad so it’s radius is overlapping the pad, and then change trace width to make the connection for DRC from the center of the wide trace radius to the connection point of the SMT pad, all while keeping out of the Edge.Cut clearance.

Aight so offsetting with the THT pad doesn’t work and combining smd pads with THT is pain in the ass especially because you can’t run python scripting in the editor sins you have to number and place every pad in the correct way and individually.

Custom grid and array tool are your friends.

which makes inconsistent pad sizes and placement my biggest enemies

Anyways whats should I do to make those half vias at the edge of the board without DRC errors and have it properly made without manufacturer notes and errors?

I can’t answer the question about avoiding DRC errors when making castellated pads (or holes or vias) because I have yet to try to make them. But, I do know that you can’t make them without manufacturer notes.

Castellated pads are a feature that is out of the ordinary for most boards. The manufacturers will (should) flag anything that looks out of the ordinary. For some manufacturers the “manufacturer’s note” might be as simple as a checkmark on the submission form, others a note in a text file submitted with the gerbers, and for others you need to actually make contact with one of their representatives. If you are planning on using castellated pads you may want to first check their website of the manufacturer(s) you plan on using to see if they have instructions in a FAQ somewhere. Failing that, contact customer support and ask how they want you to handle them.

Interestingly enough, the awesomely useful Whiteboard series just posted a video on this topic that you might want to watch.

tldr; Be sure to talk to your manufacturer about what you want to achieve and they will work with you to get the process right, given your requirements. Also, include a mechicanical layer with call-outs to specify what you want to happen.

I fount that video from the “competitor” quite long and lacking in details, but apparently still informative enough to watch it to the end.

An unexpected gem is from 24:30 where the cutout in the solder stencil is made bigger then the pads to have extra solder to be wicked into the solder joint.