This is my first SMD layout. I am confused a bit how KiCad displays the parts and a plane of copper on the top layer. If I place a filled zone on the top of the board and then place an SMD component on that filled zone, are they connected? Or do I have to run a track from the SMD to the filled zone?
Are pins 1 and 2 of L702 connected to the filled zones, so L702 pin 2 is connected electrically to pin 2 of C717 in the image above?
Thanks!
Mark
Yes, they are connected. You can easily verify this by right clicking on the Appearance Manager on the right side of the PCB editor, and then hide all layers except F.Cu. The cross you see is called a “Thermal Relief”. The purpose for these is to make it easier to hand solder the pads. Thermal reliefs are a part of the zone (but can be overridden for singular footprints or pads). In some cases you want to use the copper zone as a heatsink (For example for a voltage regulator such as the LM1117), and in such cases you should disable the thermal relief for the right pads.
Thanks for your replay and for the tip on using the Appearance Manager!
One more question regarding how KiCad displays things. The current through L702 is around 3A. Do I need to add more copper by adding a thick trace between L702 pin 1 and C709 pin 1 for example? The “connecting arms” to the copper plane seem small to me. Or, is that just how the connection is displayed?
Mark
You could do that, but I’d recommend using solid connections instead of thermal relief connections instead. Or, if you must keep the thermal relief connections, you can change the relief width to be thicker.
@craftyjon cold you explain what you mean by “a solid connection”? Also, please explain how to make the thermal relief connections bigger? I also don’t understand why/when I would choose one type of connection over another.
I found the attached image under Footprint Properties. Is this what you mean?
When I choose “solid” for L702 Connection to Copper Zones, I get this picture, which looks to be more of what I need.
Is this the right way to connect a SMD to a copper zone?
Thanks!
See here: PCB Editor | 8.0 | English | Documentation | KiCad the paragraph starting with Pad connection has more information
As to when to choose one type of connection over another, that depends on the details of your design and I can’t give you exact rules. Some guidelines (these are my personal opinions):
@craftyjon In this picture I have a 402 capacitor (C709) connected to pin 20 and pins 17,18, and 19, and the copper zone. The two tracks are 0.5 mm. Will that balance the thermal properties for soldering? Does 0.5 mm constitute a “thin” or “thick” track?.
Also, Do I need to make the copper zone match where Kicad says the copper will be, or does the area where the copper in the zone has retreated from the edge of the zone definition (the area with the 45 degree red lines) need to be addressed?
All I can say is: if that were my design, I would probably be fine with that. If you are assembling it yourself, it should not matter at all, as long as you have decent soldering equipment. If you are going to volume production, it’s the kind of thing that can matter or not depending on lots of factors.
No, you don’t. The red hatched line outline shows the maximum extent of the zone; as you see the zone sometimes won’t fill to its maximum extent if something else is in the way.
@craftyjon I have not yet attempted to solder SMD devices…may not have the right equipment and I drink a lot of coffee… I am depending on JCLPCB to make the board and assemble the SMDs. I will be adding some TH parts as needed. I guess JCLPCB will let me know if it won’t work for a small first run.
This is my first SMD layout. Learning a lot! Thanks!
0402 is a small part. A smaller part it is easier to have tombstoning problems coming from solder paste during reflow soldering being made liquid first at one pad than at the other. Pads of your C709 are obviously not thermally balanced - one pad has 0.5mm connection while second about 1.8mm. But the more important than connection width counted around pad it is a solid connection to wide copper area. Imagine that whole PCB (parts and copper) is heated to about 160°C then it gets from top radiation heating up quickly to 250°C. Parts will be heated faster then copper so when your C709 pad 2 will get liquid pad 1 will not get liquid yet because of solid connection to big copper area, I think.
I don’t know if in this case it will be serious problem or not.
If you think about making the parasitic inductance of connections as small as possible then inductance mainly depends on track length and not width, and resistivity of them are not important.
I connect blocking 0402 100nF capacitors with 0.4mm tracks but I suppose it is not needed and could be 0.25mm as my all other signal connections. I use thermal relief connections with tracks 0.25mm. So here my C709 pad 1 would have a 0.4mm track to IC and two 0.25mm tracks to zone and pad 2 would have one 0.4mm track.
I am using SMD elements since 90s. I had never used any small 2 pin SMD element with one pad having solid zone connection. I have never had a problem with tombstoning but I don’t know where is the border when problem starts. I use solid zone connection only for footprints like DPAK and only for their thermal pad. Even for SMB transils I don’t use solid connection but use 4 wide (50 mils) tracks. But I am doing all it by intuition - I have no scientific support for my decisions.
@Piotr Thanks for your insights. I have been looking at the MAX17633 Eval Board from Analog Devices for inspiration on the PCB design, combined with your suggestions, came up with this design. I took C709 off the copper zone and added a 1.25 mm track from the three LX outputs to L702. I connected C709 with two 0.5 mm tracks.
Here is a snippet from the schematic:
Is this a better way to connect C709 to prevent tombstoning?
This is what the Eval Board does:
Thanks!
From that point of view it looks being better, but as I have said I don’t know what difference between connecting pads is still good and what is not good anymore. I would not suppose connecting at Eval board be bad. And may be tombstoning problem was solved years ago with some assembly process improvements so the entire our discussion is pointless. I simply don’t know.
