Smart Clearance Tool: A idea

Hello guys,

I’ve been a long time user for KiCad now. Especially for high voltage stuff clearance is a big issue. One thing I’m really missing is easy clearance management. I’d like to propose a concept for a tool, which could help to improve clearance handling.

In the schematics editor I’d like to specify two voltages: The minimum and the maximum voltage; this I can do for every net. (For net’s not specified default clearance is assumed.)
In PCBNew I can then specify the clearance for a voltage differential. The tool calculates automatically the maximum voltage differential.Let’s say 100V means 1mm clearance. 200V is 2mm. So to the NET where we have 100V voltage differential we have 1mm clearance, and 200V we have 2mm clearance.

This tool would greatly easy design for power electronics, e.g. power supplies.
What are you thinking?


Isn’t this what you are looking for ?

You need to create a netclasse and then manually assign each net to that class.
The way you propose it is also not easy to set it individually in schematic.
Eg you have an 100V input net then you add a series resistor (eg: 1 Ohm) , the next net is still in the class of 100V, but you have to set it individually. So I think in the end you will get the same amount of work as create new netclasses and individually assign it properly in Pcbnew.

I’ve looked through the code on how to add things like the Altium rules method but clearance checking is done in so many different ways. Hopefully this will get easier once the canvas/legacy merge is done.

Part of the problem is for things like bootstrapped gate drives where you’ve got a 15V circuit that can have tight clearances internally but that’s floating on a switching node so it’s got to be 2mm or 4mm or 8mm away from everything else. I’ll keep trying but we need some sort of way to specify inter-class and intra-class clearances separately.

Also just assigning voltages doesn’t keep track of things that are primary or secondary circuits as then you need impulse-rated clearance/creepage between them.

Create a keep out zone of the right width and mark it on the silkscreen. Test labs like to see this as it makes their job easier identifying a safety barrier and shows that you have thought about it

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I would really like a tool like altium’s rule checking, I think it’s a good tool. What you mentioned is right, that my proposal does not fit all use-cases.

I would like to support some tool like that, and would be willing also to donate some money for the development for that.

The already proposed manual way, will work, sure, but will not be very productive.