I am layouting a chip on board PCB with single layer capacitors similar to this image:
The SLC have a top electrode, connected to the bond wires. The bottom electrode is connected to the ground plane. In the current setup I am going to use no cavity but place the chip and SLCs directly on the top layer of the PCB. In my old EDA program I just introduced a new copper layer above the top layer to realize the pads of the Chip and top electode of the SLC and drew thin traces to represent the bond wires.
This has some drawbacks and since I am new to KiCad I would like to get some suggestions how to manage this type layout in a convenient way.