The majority of the questions posted to this Forum are "simple" when taken by themselves. The problem is, many of these questions interact with other questions, and soon become a very complicated chain of interactions.
(Did you notice that my FIRST comment relates to your LAST comment? That should tell you something.)
I'm impressed that you are asking for advice. It's even more impressive that you've put some thought and effort into finding the answers on your own before asking questions.
Designing circuit boards requires attention to hundreds of details, and sometimes the simultaneous attention to a dozen details. If you think "attention to detail" is an insignificant character trait of those who aren't smart enough to "see the big picture", you won't do well at this task.
Most PCB manufacturers publish specifications such as those. You should DEFINITELY read them carefully when you consider a manufacturer. The verbal descriptions are not always obvious, especially to somebody unfamiliar with customary practices within the industry. The most comprehensive reference I've seen for explaining these terms was published by Seeed Studio, posted online at Seeed Studio Design for Manufacturing Handbook.
Remember that these specs typically represent the manufacturer's LIMITING capabilities. Even if the advertised capabilities have not been inflated by the manufacturer's marketing department, the closer your layout comes to these limits, the greater the chances of a manufacturing error. In some cases a manufacturer's "standard" product meets a relaxed version of the published specifications but you will pay a surcharge for boards designed at the limits of a manufacturer's capabilities.
For the manufacturer you mention (EasyEDA), I'm suspicious of the spec for "Minimum Trace Width" of 0.089mm (3.5 mils). That is pushing the limits of current practice for mass-produced boards. As I recall, most vendors providing quick-turn prototype boards in small quantities will guarantee trace widths of 0.15mm (6 mils) for their "standard" grade boards. A few vendors still require 0.2mm (8 mil) traces. Some will provide trace widths down to 0.1mm (4 mils) at extra charge and longer lead times.
Many of us allow some design margin around the published capabilities. E.g., if a manufacturer says he can produce boards with feature sizes (trace width and spacing) of 0.15mm (6 mils) for a standard board, I probably won't set my DRC limits any tighter than 0.2mm (8 mils) unless there is a definite requirement (such as a very fine-pitch part) for smaller dimensions. In fact, most of my work is done with DRC limits set to 0.38mm (15 mils).
If you are making prototypes, or doing any manual soldering, the boards will be subject to human handling. Fine features are susceptible to damage under those conditions.
Well, if you will purchase boards from EasyEDA you certainly shouldn't set the fill zones' "Clearance" any less than 0.102mm (4 mils), and make the fill zone "Minimum Width" at least 0.089mm (3.5 mils). Then cross your fingers and hope that numerical roundoff doesn't push some trace, or space, out of spec by one bit. As I noted above, I'd probably set the zone "Clearance" to someplace between 0.25mm and 0.4mm (10 to 16 mils), and the zone "Minimum Width" to 0.2mm (8 mils).
Keeping the Fill Zones slightly inside the board outline is always a good idea. Your board manufacturer will require a minimum distance, sometimes called "Edge Setback", between the board edge and any copper feature. Usually the Edge Setback value is greater than the copper-to-copper clearance requirements because the mechanical milling operation that cuts the board outline is less precise than the photo processes that create the copper features.
(Bare copper exposed on the board edge leads to long-term reliability problems. It's a place where corrosion can start and, over time, work under the solder mask. Also, when the milling cutter creates the board edge, the cutter can snag the copper and rip it off the board. And, from the board manufacturer's perspective, the high-speed bit - designed to cut epoxy/glass PCB material - can be damaged by hitting the copper.)
KiCAD's "Fill" algorithm seems to treat an Edge.Cut line as if it was a trace. This means it will leave a gap equal to the zone's "Clearance" parameter between the edge-cut line, and the filled zone. See the screenshot attached to my post at Zone Outlines & Edge Cuts. The clearance is to the EDGE of the line width of the edge.cuts line drawn - same as it does for tracks. So if you want a larger gap to the edge of the board vs. the zone's clearance to other parts of your design (tracks, vias, etc) just modify the edge.cuts line width. A thicker line will cause a larger gap towards the edge of the board. (Every modern board manufacturer defines the CENTER of the edge.cuts line as the edge of the board.)