I’m working on a high impedance circuit and I need to keep elements such as silkscreen outlines out of an area of the board. Is there a way to define a keepout area for non-copper layers so that silkscreen elements in this area will be removed?
My apologies if this has been addressed previously. My search didn’t turn anything up that was quite the same question.
Thanks for the response! I’ve attempted this approach; I added a custom rule for no graphics, and now the design rules checker throws an error for each silkscreen element in the zone. But, it seems it’s still necessary to somehow manually remove them (by changing the footprints I guess)? Just want to make sure I’m understanding correctly.
Yes, Custom rules only detect violations. There is no real time check to prevent you from making DRC violations, except from the built in copper clearance during routing. That is the only real-time check.
Yes, certainly. I think I’m being unclear, or maybe mixing up two concepts. My question was more: for example, if I have a filled copper zone, I can use the keepout to create an unfilled area within the zone. Is there a way to similarly “knock out” graphics or other elements?
It appears there isn’t, and so I suppose I can solve the problem by making new footprints without silkscreen elements for the required parts.
I guess that if you want to remove silkscreen, it does not make much sense if there is still soldermask under it. KiCad does have: PCB Editor / File / Fabrication Outputs / Gerber / Gerber Options / Subtract soldermask from silkscreen. But the wording is a bit weird. It’s more the other way around according to the tooltip: