I was doing my own footprints but there is something about the layers that I can’t understeand. When I wanted to indicate the space that the component of this footprint will occupy in the PCB, I don’t know which layer should I select to do that. CrtYd is supposed to indicate the area that is used by this footprint but, with Silks layer I could do it also right?
If someone could explain it to me with I would be very thankful.
EDIT: I attach a photo of one of my new footprints:
The silkscreen is generally used for alignment convieninece and are printed to the PCB,
The Fab layers are generally used to show the exact shape of the component, e.g. this is what it physically occupies,
The courtyard layers are used to define how far you should space them apart to make hand / automated placement reliable, I should note the default courtyard spacing is pretty relaxed, for hand soldering its easy, and for most pick and place machines, you can skim it down a fair way if you need to compact things,
So then, the Crtyd is not printed right? It is only for the PCB Distribution in order to know how much space a component is occupying. In case I want to draw in the Pcb the area of the component or just guide lines it should be done with Silk, am I wrong?
yes under normal circumstances the courtyards are never printed, its just a form of physical DRC (Are these components overlapping? If you turn it on in the DRC checking)
The fab layers may sometimes be sent to a manufacturer if your having things assembled by them, But different places have different requirements,
If you want something textual or graphical printed on the PCB, it lives on silk (or copper / soldermask if your fancy) If you just need one off alignement lines, I personally use the Dwgs.User layer (User Drawings)
E.g. if an enclosure provides a minimum PCB size, I will generally import the dimensioned DXF file to DWGs.User, Then move the features I need to the various layers, e.g. edgecuts,
What I am doing is designing different Printed Spark Gaps. My intention is to make a PCB with different shapes and study their behaviour before implementing them in a real project. That’s why I’m doing these footprints. I made them like SMD pad, then I should only put the solder paste in the pad area. Just had some curiosity about the layers.
If after explaining that someone think that the way I’m doing this is not correct, Im glad to listen other ways to do it.
Also, I made 2 weeks ago a post related to that for more info:
Well all I can say is your sparkgap only has a limited life due to its design, with only 2 major points, I know it as a backgammon pattern one,
The goal is for the point to only be where the arc starts, then to move to a larger surface with with a slightly smaller gap, e.g. 0.05mm,
Also common is this interleaved backgammon pattern, as almost all of the surface shares the same gap it can handle hundreds of arcs before the entire surface is carbonised,
Then there are other things like sawtooth spirals,
In all these cases, having a silk line that the arc has to jump over could be a good thing to include in your tests, most of the carbonizing of the PCB happens at the middle of the arc where it is thicker, ultimately leading to a conductive area of PCB across the arc gap that kills the circuits original function. Though it would increase the breakdown voltage slightly
I got more models of Spark Gaps, that’s one really basic that I copied here.
I understeand what do you mean but, do you think that with a nanosecond-pulse it will carbonize fast meaning a short life for the spark gap? Because considering that the arc duration will be really small, I don’t know till what point it can destroy the gap or the electrodes… That’s why I wanted to do an individual PCB to use an ESD Gun on them and see what happens
nanosecond at what power level, an ESD gun should only have a tiny amount of power, but if your intending it for say an automotive load dump, it can be much longer and actually form a proper arc long enough to do damage,
Similar for mains spark gaps, if suddenly a massive load goes offline, you can get uS to mS long pulses at pretty scary voltages,
In the real world the spike starts the arc, but a 2KV spark gap may only need 115V DC to sustain itself once the plasma is formed. and similar to a MOV, every new spark vaporises a tiny amount of copper at the tip of the spark gap, making the board a little more conductive, reducing its firing voltage for the next time.
Yes, it is for automotive. The different companies require us to pass the IEC 61000-4-2 standards. This one is in the scale of nanoseconds, and it’s supposed to be the more realistic. Then, I don’t think a ms or us pulse will appear or can be a problem because if not, they would ask us for harder tests and standards, or atleast that’s what I think…
In the first image the solder mask doesn’t look like the footprint that I have made (and yes, are the same footprint).
Also, there is a red border line in both images that I don’t know exactly the meaning of it.
Without removing the solder mask layer, it is not possible to see the F.CrtYd border line of the footprint, so I don’t know why.
Maybe it is something stupid but I don’t have much experience with these softwares and less with Kicad.
My guess is you set the soldermask clearance of the pad(s) to 0. This tells kicad to take the clarance set in the pcb. You have a separate mask only pad so you can disable the mask of the normal pads. (Mask only pads to not use clearance values and always stay the same.)
Another option is to set the clearance value of the pad(s) (or footprint) to something different to 0 to have exact control over it.
Tbh I didn’t touch nothing about that. What I did is draw a polygon with solder mask because I read that it acts as negative so there shouldn’t be solder mask inside the polygon perimeter but it should out of it. Then, Should I change the value of the soldermask clearance to any value different of 0?
EDIT: okay, after disabling the solder mask here in both pads it looks like the original footprint;
I don’t know exactly what this Solder Mask box makes but think its solved now…
Usually a pad needs the solder mask removed. These boxes add graphics automatically to the selected layers, so by default the Mask and Paste layers are selected here (the latter for SMD pads) and you automatically got a hole in the mask and a hole in the paste stencil. Those two also got their own clearance values because you rarely want them to be exactly the same size as the copper pad.
But I can’t understeand it at all… I thought that these technical layers, those you had selected were the layers that you were able to work with while designing your footprint. So if my pad is using SMT, why should I disable the layer that is supposed to indicate where the solder paste should be?
Maybe I’m explaining wrong or I don’t understeand what you mean at all.
I will explain it again and I’m sorry for any missundersteanding
My SMD pads will be my electrodes. They will be made of tin. In the gap between pads/electrodes, I removed the solder mask applying the negative layer of it. Should I cover all the pads with negative solder mask or with the gap as I did is enough?
Also, what I understood is that just in my case the solder paste layer should be off because I don’t want solder paste on my electrodes.
Related to that, When I did my electrodes/pads with special shapes I filled them with lines of Solder paste layer and after that, I created a pad with everything. Is there a problem with that ?
Thanks for your pattience, I really appreciate it.