I’ve been trying to set track widths depending on class using custom rules, but I’ve found a few issues.
I have setup a netclass ‘P8V0’ which contains the nets ‘P8V0 Supply’ and ‘P8V0 Return’ using the pattern ‘/P8V0*’ and assigned the netclass ‘P8V0’ to them in the schematic editor.
When I use the custom rule below using the netclass name, it doesnt apply:
(rule "P8V0 2"
(condition "A.NetClass == 'P8V0'")
(constraint track_width (min 2.5mm)(max 2.5mm)(opt 2.5mm)))
However when I directly call on the net name using the code below it works fine:
(rule "P8V0 1"
(condition "A.NetName == '/P8V0 Supply'")
(constraint track_width (min 2.5mm)(max 2.5mm)(opt 2.5mm)))
To make it even more confusing on another PCB I have this rule which works as expected:
(rule "JTAG In2.Cu/In5.Cu"
(condition "(A.Layer == 'In2.Cu' || A.Layer == 'In5.Cu') && (A.Netclass == 'JTAG')")
(constraint track_width (min 0.373mm) (opt 0.373mm) (max 0.373mm)))
I’m obviously missing something, but unsure what. I have tried using global labels instead of local labels and no change.
Any ideas? Its probably going to be something obvious.