Seperate Supply Voltages


I’m doing digital designs with 2 or 3 different supply voltages. All digital components automatically lock to VCC. How can I solve (split) this without manually editing the netlist?


What do you mean by saying “lock to VCC” As far as I know in Eeschema nothing lock to anything by itself. You just need to place whatever power port to whatever pins you need.


The symbols have got the power pins ‘attached’ to VCC and GND.
If you want something else you have to edit the symbols, especially those pins and set them to visible.

For example:

EEschema seems to create global labels on the fly for pins that are invisible in symbols, so they get connected when you create the appropriate connection ‘somewhere’ in the schematic.
I’m pretty sure the beginners tutorial will have covered that one…
This will make it easier to concentrate on the function of the IC in question, without the need to wire power to each and every one of them - less clutter.

Personally I don’t use the kicad libs, so I have no real experience with this feature and the schematics I work on are not that complicated that I would need ‘less’ clutter … yet.


That is NOT true for the ‘logic devices’ like 74xxxx.


I know, but a do not want to create triple sets or place the power to every device in the sheet.
Maybe I write me a netlist editor …

I do not use the KiCad libs for ‘logic devices’ like 74xxxx - these are not even compliant to DIN EN.


The components in whatever library you’re using is stupidly designed and has the power pins both hidden AND assigned to a net called VCC.

You will need to edit the components to unhide the power pins and to delete the net name from the pin definitions.


That’s how I do it:

Symbols are all as small as possible and custom.
I asked the electronics engineer I work with which way he preferred it, and he chose this over the other, where you don’t see the power pins.


Sorry, I wanted to post a description and example how I solved it.
But the post got censored by KiCad.


Hm… sure?
I’ve seen spam here, no such thing as real time censorship here, really.
Maybe the forum was busy or something, had that happen a couple of times lately…
Anyhow, would still be interested to read how you solved this, might learn something from it :slight_smile:


They say I’m a ‘new user’, but don’t tell me how to get old.
I’m not allowed to post an image etc.
Well, I just retired - and seen in geological dimensions - this is new.


Got it through the Design Rule Checker error free!
A good description how to do will take some time, letters and some images.
If you send a mail to, I will send you a pdf within some days.


You just gotta scroll down a couple of threads (read them) and post some… restriction lifted for me after 1-2 days I think.

If you click on the top right and your logo and then on ‘Profile’… there is a pane to the left… go to ‘Badges’.
If you click at one of those badges, you’ll see a list of people on this forum who got that too… click on the badge symbol at the top left to finally get to a page which explains how this forum works.
Or just click on this link:
Yeah, I wasn’t told either… just being curious and click-happy does the trick usually :grinning:


OK, checked that.

In simple words:
The power symbols are all inputs. A net with only inputs requires one single output connected. Could be a power output or a simple output from any component.

Got a working design with 3 insulated logic supply grounds and 4 logic supplies done. Well - and an own library of the logic devices and one of the powers I used.


I’ve had the same problem, I had 2 x 4050 gates, I wanted 1 to be powered from 3.3V, and the other 5V. As the gate power pins are locked to Vcc, Vss (invisible pins) I couldn’t separate them. I had to do it manually in the PCB. This caused further problems, as every time I updated the schematic and updated the netlist in the pcb it would reset my hard work.


I’d suggest creating your own symbol with all pins defined


I have my own libs for logic devices, microcontrollers, etc. now.
Updated when something new comes by.
This way I also get a common style for the components in the schematic (everybody making a device seem to have his/her own style).
Open the ‘source lib’.
Get the component and modify to your need (power pin visible and defined as inputs)
Open the ‘target lib’ where it shall go in.
Press ‘save component’

Just some minutes for each component.


Thanks for the tip. I’ve only just starting getting used to the library editor and copying components, and your right its not that slow to do either. It’ll definitely save me time in the long run with re-imports of netlists. Cheers.


Probably the best thing to do. Twenty years ago when an entire board of TTL logic ran at 5V, hidden power pins made tidier schematics. These days it is normal to see three or more logic supplies on one pcb and I would question if it still makes sense


I’m often ask for parts replacement in system designed in the late 70s. And all these new high density electronics do not survive long if you go high off the ground. Radiation destroys these small structures.
Sold some ceramic 80286 to the NASA not long ago.
There are also components that look like an ‘normal’ ic, but the logic inside is built of small Tetrodes.
The lifetime is another problem if you have to think in decades. Bad with that ‘new’ stuff.


Way off topic, but it turns out that the very fine structures of modern CMOS design nodes makes the parts quite radiation tolerant. Obviously the design needs must be considered, and you have to handle the cases where parts do latch up or where logic loses its mind (perhaps with TMR in synthesis). Packaging and cooling remain challenges.