I have a ground net that I would like to divide into 2 regions connected at a common point. I have given the two regions different net names but the PC layout tool DRC (I think) says that they are the same net and one name will be used by all. I could handle this in layout by manually laying out a single common connection between the two regions (nets). But, I am having problems with vias connecting to the ground plane where they should not. I could define the edge of the ground plane to avoid this, maybe, but that seems a bit painful. This is a surface mount board - perhaps just avoiding vias on those parts would do it? Can you suggest an appropriate strategy here? In case it makes a difference, I am still on V5 because I refuse to change major versions in the middle of a (long) project. Thanks - Jim, Oregon Research Electronics
Are you sure you want to do this? I guess you’re attempting to split a GND plane into an “analog” and “digital” section, and that has been debunked and deprecated for many years, but it’s a stubborn misconception. But I don’t know your goal, so I could be wrong here.
It is an attempt to reduce EMI prior to actual testing. It is all analog (switch-mode power) though in a tough digital environment that includes PWM audio and multiple digital clocks. It also involves power distribution across multiple boards - so the EMI opportunity is significant. Anything I can do to reduce emissions and susceptibility is significant coin of the realm when testing happens.
I do not remember the particulars, but I believe I have asked colleagues whether anyone had solid evidence that partitioning ground (as in using a net tie to connect analog and power ground) provided better performance, and I remember that at least someone did.
The semiconductor manufacturers such as ADI and TI do tend to recommend it in places.
Power conversion is about all that I do.
Some recent experience I had was with the LTC3311S. With 5V input and 0V85 output at about 10 Amps, it seems that the layout for this thing was extraordinarily finnicky. Subharmonic oscillation was a common malfunction. It was less critical with higher Vout and lower Iout.
Another detail that sort of torques me…many of the datasheets will show a sample pcb layout but will not give you details of the components shown. If you do some “eyeball” measurements you see that some of the passives look like 0201 or 01005 chip size. I use 0603 routinely, I struggle with 0402 and try to avoid them, and I refuse to go smaller than that if I will need to work with the component on the board.
As for net ties, I have not yet attempted this in KICad 8.X. But some time ago, I wanted to put a net tie onto an inner layer of a 4 layer board. KiCad did not want to do that, but I was able to do it somehow by text editing the layout file. I do not remember the details. But if you want to attempt such things, make a backup copy first!!
I am not convinced that splitting your GND plane will give any EMI improvement.(High frequency) Currents always find the path of least impedance, and for anyting over a few kHz the loop inductance dominates. If you use split GND planes, then no High frequency signal can go over the gap in the GND plane either.
Layout of SMPS circuits is critical, “hot loop” is a good magic word to find info. Syncrhonous SMPS IC’s also perform much better in the EMI department, because the path that the high speed switching current takes changes very little when it goes from the switch to the diode and back.
I am also no expert myself in this area, but every time I do some research into split GND planes, the answer is just don’t do it. The two hour 19 minute video form Rick Hartley about how to design a good GND plane is worth watching twice. Others have made more specific video’s about EMI in SMPS designs. It would be nice to see a measurement comparison of the same design with and without split GND plane.
I long ago did “very high speed digital design” with analog audio out. Background: I was involved in building the supposed “fastest workstation in the world” and the “fastest personal computer in the world” per magazines. We were running in the blistering high bus speeds of 60 MHz range (yes, that long ago, but before chips had decent risetime control and the EMI was atrocious). I was the lead EMC person for Motorola Computer Group and our group achieved over 95% success in EMC tests in the first design pass designing everything from 4 layer boards to 24 layer boards at up to 3 GHz. That being said, things have REALLY changed and my experience may be really dated.
I taught in my classes around the world that “Currents just want to be happy”, this follows what another person stated. People who say EMC is black magic just don’t understand it. It is a bit tricky and parasitics are quite troublesome.
My ground (and power) plane recommendations: DO NOT break up your ground plane over the digital section. DO NOT route ANY digital signals over your analog plane. Provide a SINGLE point ground between the analog and digital section located at the DAC For the best EMI rejection, i liked putting a ferrite bridging the gap between the chassis ground and the analog ground. I also put a high frequency decoupling cap from the analog signal line to the chassis ground, but only populated it based on EMC measurements (you can do these in the lab using a common mode probe and a spectrum analyzer, but that is another topic). Saving fractions of a penny on a large volume design can make a big difference.
This is a great response. I don’t think things have changed much, other than by scale.
The short version:
If you are just splitting ground planes because someone told you it was a good idea or you read it somewhere, there is a substantial chance it is a bad idea.
If you are splitting ground planes because you have carefully figured out where ALL the signal and power currents AND their return paths (“ground” currents) flow, and are deliberately providing return paths that keep some return currents as separate as possible from others, then it can really help you.
Two cautions:
Return paths through a ground plane (or any ground connection) are highly dependent on frequency.
If you separate ground planes and connect them with a small strip in one place, be sure to consider how they might also be connected outside the PCB as well, since this can make a great big loop through cables and such, and these loops can make fantastic antennae and resonators.
