Hi all,
How can I get rid of 2 not used Gates within a CD4071 in the schematic editor. When I delete them the ERC is always asking for it. Is there a special function to hide the unused gates from the schematic?
Thanks for any help on this.
Best Werni
The unused gates can be placed on the schematic sheet and be labeled as spares (or other terminology). In any event, the inputs of the unused gates need to be properly terminated and should not be left floating. This should be shown on the schematic, so again, show the unused gates on the schematic.
I would recommend to leave the unused gates in the schematic and connect all their inputs to GND to avoid possible oscillations of these gates since their input impedance is very high, nearly infinite, and they may react to any signal change nearby.
telyn
Any unused gates on the schematic should be there, but you can put a blue ‘X’ (No Connect flag) found down the right side of the drawing area on the inputs and the output and the ERC will be happy
Thank you very much for Help!
Thank you that was very helpful! I’ll do that
Best Werni
As @telyn says, CMOS logic inputs should not be left floating - they can make the gate get into a high current state.
I was taught to connect spare gate input to ground through a resistor, so the a future board modification could use the gate
Thanks a lot!!!
Best
Werni
There are big serie of single-gate ICs. May be 74HC1G32 would be OK for you (depends on VCC voltage you use). You will have no problem with spare gates.
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