Scary PCB Editor Design Rules Checker Miss

Layout
1

Hello! I have been working on a small PCB that uses the TDK MEM2012F10R0 10MHz EMI filter. I downloaded the models off of the Digikey link. This small part has two ground pins, and two pins for the signal. The layout passed everything in the design rules checker (with the default Ignored Tests). I almost sent it for build, but had a last-minute design change. While in there, I visually noticed that the signal from the mic and to the codec, was mistakenly attached to the GND pins of the TDK filter, and that the two signal pins were grounded. Oops. The nets were clearly not matching the Net Names on the pins. I must have misunderstood, because I thought the Design Rules Checker would compare layout nets with schematic nets to ensure completion and correctness. Does it not? Do I have it set wrong? Thank you.
The scary part is that the microphone signal would likely have passed through the filter’s ground and worked just fine, leaving us with the illusion that we were having a filter.

Application: KiCad Schematic Editor arm64 on arm64

Version: 8.0.4, release build

Libraries:
wxWidgets 3.2.5
FreeType 2.13.2
HarfBuzz 8.3.0
FontConfig 2.15.0
libcurl/8.1.2 (SecureTransport) LibreSSL/3.3.6 zlib/1.2.11 nghttp2/1.51.0

Platform: macOS Ventura Version 13.5.2 (Build 22G91), 64 bit, Little endian, wxMac
OpenGL: Apple, Apple M1 Pro, 2.1 Metal - 83.1

Build Info:
Date: Jul 17 2024 00:34:47
wxWidgets: 3.2.5 (wchar_t,wx containers)
Boost: 1.84.0
OCC: 7.7.2
Curl: 7.87.0
ngspice: 42
Compiler: Clang 14.0.3 with C++ ABI 1002

Build settings:

2

Meaning?

Probably some fault between the symbol and footprint from those external libraries, but impossible to tell without seeing the project itself.

The normal / usual way is to use but never trust libraries. Always verify pinouts of both schematic symbols and PCB footprints, regardless of the source.

It’s also common to maintain your own libraries of verified and known good libraries.

3

What are you saying in short? That the layout doesn’t match the schematic? Did you tick the box Check for Parity with Schematic?

4

Thank you for the pointers. Very helpful.

5

It let me hook it to the wrong nets without complaining. I haven’t seen that checkbox, thanks. I like to run stuff down to root cause, I’ll see if I can do that - tomorrow.

Thanks to you both!

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