Same wire, two different names

Layout
1

Hi,

How to reproduce:

  1. Draw a schematic, generate netlist, create a pcb, connect the wires.
  2. Change a label in schematic, re-generate netlist, re-read netlist in pcbnew
  3. Connect the wire shown by a white line.
  4. One side of the wire will be renamed to the new label and other side stays intact.
  5. No errors reported.

Video name: same-wire-two-names : https://aktos.io/cloud/d/44af2bf2c7/

2

I tried to reproduce your problem.
Yes the wires are not deleted if you change the connection within the schematic. (That’s annoying.)
I don’t have a nice workaround for that. The only thing you can do is delete the wires that are effected. I’m not sure if this problem can be easily fixed.

In my tests, DRC always tells me that something is wrong. (Errors: “Two track end too close” and “Track near pad”)

Which version of KiCad are you using?

3

This is normal.
Not defending it, just saying I experience this a lot if you keep changing net names for swapping to easy routability.

Delete a section of the wire in the middle to break up the trace, getting on name on 1 side the other name on the other side.

Reread the netlist.

4

You are right, it gives “Two track end too close” error if we re-run DRC

Yes, this approach works and is better than having nothing.