When I put a default SMD footprint on the back of the board, I can route traces over the front in the area where the pad is with no problems involving clearance. Basically the pad doesn’t seem to exist at all on the opposite layer of the board.
My problem is that I created a through-hole component with no copper on the front of the board, but I still can’t route traces over it. It acts as if there is copper on the front and avoids it with respect to the clearance settings. Does anyone know why this is so if the pad is set to the B.Cu layer only?
KiCad does not keep a clearance from the (non existing) pad, but it does keep the clearance from the hole of the THT pad.
I have a vague memory that there once was a bug which caused this kind of behavior. If there was, it has been fixed. Unless you have an old buggy version, what Paul says is true.
How is your pad actually defined? KiCad can’t set B or F layer for a THT pad explicitly. There’s an option for “Connected layers only”. I just tested and it works as expected with regards to clearance.
If this is a plated through hole, there must be copper on the front side for the plating process.
A NPTH with a pad on the back should behave more like an SMD pad, but a track on the front then has to be aware of shorting to the component lead
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