Routing hindered by unexpected diff pair routing DRC

I have come across something that mystifies me. I have started using net labels. But for some label values, specifically “D+” and “D-” on adjacent pads I cannot seem to route anything from the pads, if I use tracks just slightly wider than the pads. If I rename either label (to “DPLUS” or “DMINUS”) it works fine.

I first thought this was due to a footprint I made myself where the copper clearance reached the other pads but this is not the case in the below example.

Version: 5.0.0-fee4fd1~66~ubuntu18.04.1, release build (I’ll put the full version info if/when I submit a bug)

Here is how to reproduce: open a new project, place a single 4001 OR gate in a new schematic, unit A, give pin 1 net label “D+” and pin 2 net label “D-”. Associate the footprint Package_SO:SSOP-14_5.3x6.2mm_P0.65mm. Start pcbnew and update from schematic. Change track width to 0.4 mm, and try to route from pin 1 and 2. Works fine. Delete the tracks. Change track width to 0.41 mm (wider than pad but not into copper clearance) and try again. Works fine for any pad EXCEPT 1 and 2.

Must be a bug, or?

Labels ending in +/- indicate to kicad that the two tracks should be part of differential pairs. It might be that your differential pair setup contradicts DRC.

The home-made footprint is for a microUSB connector so the two do constitute a differential pair. I suppose the DRC checks the distance between the two?

OK, so diff pair gap is 0.25 mm, that is the explanation, thanks.

…and I did read correctly in the data sheet, the recommended land pattern has separation 0.2 mm for the pads in question. That is what threw me off in the first place.

This brings up a good question. Is there a rule of thumb (i.e. usually good enough) diff pair setting for USB lines? I don’t like trusting defaults for PCB geometry settings (look at the default solder mask offset).

Is there a resource to learn about how to properly calculate diff pair settings? Does the TransLine/Coupled Microstrip line calculator in the KiCad PCB Calculator give sane results for diff pairs?

Should this question be a separate topic? :wink:

See this post:

And: you can find advice for USB differential pair impedance online

Another question then, about the user interface. Since differential pair labels automatically enforce differential pair DRC, why doesn’t routing automatically switch to differential pair routing when routing such a net?

Personally I don’t think the behavior should be automatic, and certainly not dependent on the net name suffix. In my opinion we should be able to define directives on the schematic that determine which nets form a differential pair. Directives could also be used, for example, to select a group of nets that must have the same length to within a specified tolerance.

I’d tend to agree. With that DRC rule silently enabled, I couldn’t route at all, and no indication why. (On the other hand, if diff pair mode was enabled, I would see that it routes the pair and not the single route I intended, and I would suspect what was going on.)

I think this wishlist bug report is related to what you describe here:

The rule of thumb for USB differential pairs is 50 ohms to ground for each trace. And 90 ohms betweem them.

Saturn PCB toolkit can help you calculate it. But be aware its much easier to do on thinner PCB’s. E.g. a 1.6mm board will be roughly 0.8mm wide traces with a 0.2mm gap and 0.2mm gap on both sides to ground.

However if your traces are shorter than 1/20th of the wavelegth of the signal of interest you can ignore impedance matching for most digital circuits. E.g for USB 2.0 this means any trace shorter than 32mm is not something you need to worry about matching.

We definitely shouldn’t be enforcing dp rules unless routing dp (

There’s also a related bug about dp clearance on nets vs. pads that might be of relevance but can’t seem to find at the moment.

My use case exactly. Which is good, 0.8 mm traces can’t be connected to the pads of the USB-micro footprint unless I perform manual neckdown.

AFAIK in both PCB and IC design software, DRC usually regards to production minimum dimensions. Therefore defining diff lines space/width as such might lead to unnecessary limitations:

  1. The above example of 0.8mm traces that cannot connect to pads is one.
  2. In addition, there is no meaning to enforcing diff lines spacing from other signal lines, especially analog ones. It is up to the designer to verify sufficient isolation etc. anyways.
  3. You cannot easily taper the lines to get impedance transformation.

For me, (1) makes the use of diff lines very painful. I would suggest dropping the DRC style of diff lines and just make it a drawing style which creates the lines with proper spacing, or at least allow the user this option.

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