Routing between pins doesn't work well

Layout
1

Hello!

I noticed something when trying to route a trace between pins.

For instance in the image below, I would like to route MISO. For instance, if I want to draw MISO from pin 10 to pin 10 of the chip on top right, I can choose to go between pins 9 and 11 of the connector. But it doesn’t work because the grid doesn’t allow me to draw a trace between these 2 pads. By the way, I’m using the semi automatic routing. I don’t remember the name and I don’t find where it’s configured, so I just hope you understand what I’m talking about.

If the grid happens to be exactly between both pads (see the second figure on the horizontal line between the 2 rows of the connector).

Is there a way to configure it? If not, will it change in the future? Ideally, if there is enough space between the pad, it should be treated as an exception to the grid and draw an off-grid trace.

Routing

Routing2

Thanks,

Pascal

2

In these cases I set the grid origin in the centre of one pad, for example pin GND-14

Then I choose a grid 1/4 or lower of the distance between pads. If the distance is 100mils/2.54mm I use the 25mil/0.635mm, 10mil or 5mil.

This way the grid is exactly in the middle between 2 pads.
After finishing routing this component you can come back to set the grid origin at (0,0) if you like.

1 Like
3

Things are moving around a bit in KiCad.
What version are you using?

I have Version: 5.0.2+dfsg1-1, release build at the moment.
You can show this with:
Pcbnew / Help / About KiCad / [Show Version Info]

You very likely want to use the interactive router.
If you have not already enabled the “modern canvas” so so first by:
Pcbnew / Preferences / Modern Toolset [F11]

Then you can change the behaviour of the interactive router in:
Pcbnew / Route / Interactive Router Settings

Normally I only use a coarse grid for placing components, and sometimes for working with arrays.
When drawing PCB tracks I completely depend on the Interactive router and the design rules.
While drawing the tracks you can just as well set the grid to 1mill or smaller.

The design rules are imporant. They define the width of the PCB tracks and the clearances around them, and therefore these ultimately define whether a certain track can be routed between 2 pins or not.
You can find these in:
Pcbnew / Setup / Design Rules.

4

My uncalibrated eyeballs suggest that there may not be enough room to route the trace between those pins, or perhaps just barely enough room if you don’t get bitten by roundoff errors in the DRC. One trick is to place a very thin trace - even thinner than permitted by your design rules. Once the trace is in the exact position you need, increase the trace width to the desired size. If you get DRC squawks, reduce the trace width very slightly. (E.g., set the trace width to 9.99999 mils (0.249999mm) sted 10 mils (0.25mm).) You can verify the trace’s exact location using its “Properties” dialog, manually entering values for the end points if necessary.

Dale

1 Like
5

Dale, if there is enough room to route the horizontal track, there should be the same room for the vertical one.

6

To me the (low resolution) screenshot looks like a standard 100mill THT connector with the default design rules and if so, there is plenty of room to draw the traces between the pins on a small enough grid.

Toying around with all those nines does not look very productive to me. It’s much better to get your design rules set correctly with plenty of room for rounding errors. If I remember right KiCad works internally with nano meters. I do not (want to) know to how many nine’s that translates, but depending on such small tolerances is a very bad idea. Such things may lead to design rule violations if for some reason rounding errors in KiCad shift around for example.

7

Hello!

A few more details:

  • I’m using version 5.0.2 and now I’m using the latest nightly build.
  • I’m using the interactive router.
  • My design rules are compatible with what I’m doing. A proof of this is that the horizontal traces are routed without any problem.

By the way, there is no rounding problem.

  • The default pads were 0.9 (with 0.6 hole).
  • My trace width is 0.125mm, the clearance is also 0.125mm.
  • The connector pitch is 1.27 in both directions. So 1.27 - 1 track width - 2 clearances leads us to 0.895mm
  • I have changed the pad width to 0.89. If PCB new is rounding to the nearest nanometer, then I’m safe by 5000 nanometers.

So I think it’s just a problem of the interactive router that does not accept to route a trace if off grid. If I set the grid to 0.01mm, it works, but I think the interactive router could make an exception and “understand” where I want to route the trace. My previous CAD software was handling this nicely, so I don’t think it’s beyond technology.

Thanks,

Pascal

8

File a bug. Post link here, and I’ll mark it as “affects me too”.

1 Like
9

Can zip your project and post it here?
(Or a severely castrated version with just the offending connector, some random IC’s and your design rules in place?)

I’m kind of curious what it looks like if I open your PCB in Pcbnew.

10

Hello!
I made a project that illustrates quite well what I’m talking about. See the picture below.

Routing1

Unfortunatley the pins cannot be seen at that scale. As for J1, pin 1 has e marker. Pin 2 is on top of pin 1, and the even pins are on top. Now let’s try to route the odd pins. For example, I can try to start from pin 1 (3V3) and try to go to pin 8 of the chip (you can notice the air wire). If I try to go between 2 and 4, here is what happens:

Routing2

This is the last point where I can go to. If I try to go further, here is what happens:

Routing3

When moving the mouse upwards from picture 2, the wire is blocked, and if I continue a bit more, then suddenly the trace is rerouted to the left of pin 2 which is certainly not what I want. And beside this, you can notice on the first picture that there is nothing to gain to route if to the left, otherwise you will need a via to go to pin 8 of the chip.
Now you may think there is no enough space between pins 2 and 4?.. There is. If I try to start routing from pin 3, then it works fine. And there is no apparent relation anymore with the grid size as I first thought.

Routing4

Now here is what further happens:

  • Pin 3 cannot be routed to the right, Same thing as above happens.
  • Pin 5 can be routed both sides (between 4 and 6 and between 6 and 8).

Now I tried changing the grid to 0.01, it doesn’t allow to route pin 1 properly either.

Here is a zip file of the whole project. I hope my pattern will show in the project, The small connector is a custom one.

RoutingBug.zip (2.2 KB)

That’s about it. Jan-Ake, does it correspond to what you observe?

Pascal

11

The schematic and the layout are empty, no symbols, no footprints.

Maybe all your symbols and footprints are taken from your global libraries.

12

The pcb is endeed empty, but the libraries don’t matter because footprints should be embedded in the pcb file and the schematic doesn’t matter here at all.

1 Like
13

RoutingBug.kicad_pcb from the zipfile has a filesize of 51 bytes and only contains the text string:

(kicad_pcb (version 4) (host kicad “dummy file”) )

I assume you forgot the save the schematic / pcb / project before you zipped it.
That’s now 3 people willing to look at your problem :slight_smile:
I’m also curious about portable KiCad projects, so it would be nice if …
[Edit]
There is a: “_saved_RoutingBug.sch” which gets auto deleted when KiCad exits. This is a valid schematic though with a 10 pin connector and a FM24C64B. Just perfect as a small test program.

Please save your project and exit KiCad before you zip and post your project.
(This is usally also prefered whan making backups etc.)

Idea:
If you can route from pin 3, but not from pin 1, then maybe it is because pin 1 is from a power supply net, and you may have set the netclass to sligtly different values for that net.

14

Follow up:

I found the: “(version 4)” string in the kicad_pcb file a bit weird.

So I opened a recent dummy project of my own and there the kicad_pcb file starts with the line:

(kicad_pcb (version 20171130) (host pcbnew 5.0.2+dfsg1-1)

Also your schemic starts with:

EESchema Schematic File Version 2

While in my recent project the schematic file starts with:

EESchema Schematic File Version 4

So I wonder how old your KiCad version is. If I do:

Eeschema / Help / About KiCad / [Copy Version Info]

and then post it here:

Application: kicad
Version: 5.0.2+dfsg1-1, release build
Libraries:
wxWidgets 3.0.4
libcurl/7.63.0 OpenSSL/1.1.1a zlib/1.2.11 libidn2/2.0.5 libpsl/0.20.2 (+libidn2/2.0.5) libssh2/1.8.0 nghttp2/1.36.0 librtmp/2.3
Platform: Linux 4.19.0-1-amd64 x86_64, 64 bit, Little endian, wxGTK
Build Info:
wxWidgets: 3.0.4 (wchar_t,wx containers,compatible with 2.8) GTK+ 2.24
Boost: 1.67.0
OpenCASCADE Community Edition: 6.9.1
Curl: 7.62.0
Compiler: GCC 8.2.0 with C++ ABI 1013

Build settings:
USE_WX_GRAPHICS_CONTEXT=OFF
USE_WX_OVERLAY=OFF
KICAD_SCRIPTING=ON
KICAD_SCRIPTING_MODULES=ON
KICAD_SCRIPTING_WXPYTHON=OFF
KICAD_SCRIPTING_ACTION_MENU=ON
BUILD_GITHUB_PLUGIN=ON
KICAD_USE_OCE=ON
KICAD_USE_OCC=OFF
KICAD_SPICE=ON

Your problem has probably been fixed long ago.
Do you have a specific reason for using an old version of KiCad?
KiCad is changing (and improving) quite a lot, and you may be way better of by uptrading to KiCad 5.0.2.

2 Likes
15

Hello!

Thanks to everybody for your replies, and really sorry for the empty project.

Idea:
If you can route from pin 3, but not from pin 1, then maybe it is because pin 1 is from a power supply net, and you may have set the netclass to sligtly different values for that net.

I can route from pin 3, to the left only. It should work whatever path I first choose. So I reopen the file and try from all the pins:

Pin 1 and 3, see above
Pin 5: works both ways, between 4 and 6 an also 6 and 8
Pin 7: doesn’t route if I want to go between the pins above. I’m aware that the trace from pin 10 is in the way, but hey, it’s configured in “shove” mode and should push the existing track if necessary. Anyway, pin7 doesn’t route between pins 6 and 8 either.

I found the: “(version 4)” string in the kicad_pcb file a bit weird.

I installed the latest nightly build (at least the latest yesterday), which was kicad-r12265.f425f49c1-x86_64.exe.
Anyway the problem happened already in the latest stable version which is 5.0.2.
So maybe it’s a bug in the file generator which uses old strings, I don’t know, but what I can tell is that it was installed yesterday with the installer above.

Application: kicad
Version: (6.0.0-rc1-dev-1650-gf425f49c1), release build
Libraries:
wxWidgets 3.0.4
libcurl/7.61.1 OpenSSL/1.1.1 (WinSSL) zlib/1.2.11 brotli/1.0.6 libidn2/2.0.5 libpsl/0.20.2 (+libidn2/2.0.5) nghttp2/1.34.0
Platform: Windows 8 (build 9200), 64-bit edition, 64 bit, Little endian, wxMSW
Build Info:
wxWidgets: 3.0.4 (wchar_t,wx containers,compatible with 2.8)
Boost: 1.68.0
OpenCASCADE Community Edition: 6.9.1
Curl: 7.61.1
Compiler: GCC 8.2.0 with C++ ABI 1013

Build settings:
USE_WX_GRAPHICS_CONTEXT=OFF
USE_WX_OVERLAY=OFF
KICAD_SCRIPTING=ON
KICAD_SCRIPTING_MODULES=ON
KICAD_SCRIPTING_PYTHON3=OFF
KICAD_SCRIPTING_WXPYTHON=ON
KICAD_SCRIPTING_WXPYTHON_PHOENIX=OFF
KICAD_SCRIPTING_ACTION_MENU=ON
BUILD_GITHUB_PLUGIN=ON
KICAD_USE_OCE=ON
KICAD_USE_OCC=OFF
KICAD_SPICE=ON

RoutingBug.zip (5.3 KB)

Pascal

16

Hi

Actually, I’ve been able to route tracks from pin 1 and pin 7. If it matters, I used a 5 mils grid.

kicad_pcb
kicad_pcb1088×500 7.86 KB

But I had to “insist” and move the cursor way above the even pads (on the right for pin 1, and on the left for pin 7). I can’t explain why it’s easier for the other pins (or other directions). I’ve been also able to route a track from pin 7 in the right direction which pushes the track already placed from pin 10, but it took me many attempts to achieve it :wink: Weird…

kicad_pcb
kicad_pcb983×456 6.91 KB

I’m running 5.0.2 on Win7.

17

Hello!
Ok, in my case, it doesn’t matter how long I insist, it doesn’t work at all for some pins, and it works for others. Not at once, but after 15 ~ 30 seconds fighting, it works.
I’m not sure I can post videos… Here is a try:

OK apparently it works (I mean: the movie, not the router).

Pascal

18

Not sure the grid you’re using but I used the 5 mils grid;

Also, the cursor (cross) had to be placed above the even pads (6 - 8 -10) and moved to the left (or to right), until the track was finally placed.

19

Just in case, I have set the grid to 5 mils. Same result. Then I have also tried to be over the pads and move left or right, same result.
But anyway the way I was operating leaves no doubt on my intention to drag the wire between 6 and 8, then between 8 and 10.
Pascal

20

It looks to me as thought the gap between pads is 0.370mm and the trace + two clearances is 0.375mm, the trace just goes through sometimes by chance or rounding error.

Bear in mind it is early and dark here. I’m still on my first coffee so please someone check this for me :slight_smile: