Routing Allwinner H3 with 347 balls bga?

Dear Members,

Is it possible to route 347 balls BGA Allwinner H3 with DDR using 4 layers PCB ?
I check the price for 8 layers, it’s very expensive $325 for 5 PCBs with stencil,

Any alternatives ?

0.65 pitch. Lots of different power supply pins too.
How about 6 layer?
This chip seems to be five years old, forever in the SOC world.

6 layers is $120 for 5 pcbs, 4 layers for $50,
Will it work with 4 layers ?

Only one way to find out and that is to try.
PC motherboards have mostly been 6 layer for many years

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To get an idea wether this is doable you can have a look at the Olinuxino A64.
The Allwinner A64 is probably a more complex tile than the H3.
The Olinuxino A64 is a 6 layer board designed in KiCad.

Maybe Olimex has even done a H3 board, or a board better comparable to the H3. The older Olimexino boards are done in Eagle, that may be a good opportunity to test the Eagle -> KiCad conversion :slight_smile:

I have no experience with this level of PCB layout though.

I reckon, it’s possible for 6 layers then…

I thought I answered this for you last year?


I guess you did, I just got the chance to return into this project…

it has 3.3V, 5V, 1.2V, 1.8V and GND, I will share a plane for those voltage,
any clues, here is my stack

That seems to be a 8 layer stackup, I thought you where trying to avoid 8 layers?

Start with 6 layers, and rather than power planes for the voltage rails, run them to the back side of the board directly into decoupling capacitors, There is not much power stuff to juggle, its mainly going to be making sure you have enough ground to keep all your high speed signals spaced and controlled impedance,

If your willing share your project with your H3 and DDR in position and I’ll see what I can make of it, my gut is telling me 4 layers may even be possible, but 6 will be easier.

Isn’t this chip used on the lookalike pi clones (Orange Pi, Cherry Pi etc)? These are available for around $10 -15; I would be surprised if they were any more than 4 layers at this price point tbh. If you are serious about routing one of these, having a look at one of these boards might be a good start. I thought they were open source but I guess that might not extend to the PCB layout.

It might indeed be very well worth the investment of EUR 15 just to get an Orange Pi, or one of the similar boards just to have a look at the layout.

Lots of squiggly lines betweent the H3 and the RAM.

Just had a short peek at and they claim:
With no trouble I found a link to a multi page pdf with schematics on google drive, but I did not see board layout files or Gerbers.

Yes that’s the board I want to build, I change the regulator system with LM2596.
They don’t have the board layout or gerber, only schematic, that’s why I rewrite all the footprint and PCB,
I use same plane for all the voltages, so I can safe space, is it stable with 4 layers?it’s a lot cheaper with 4 layers. I will try with 6 layers anyway.

Allwinner H3 OLinuXino in Eagle format:

I’d say “no”. I did a 324 pin (18×18) layout with six layers, and while only four of them are used for individual signals, you cannot thread the power supply through the remaining space, so you end up with at least one, better two extra layers.

Rule of thumb for regular vias: the outer two rings of pins use the top layer, then the next two take the bottom, then each additional ring requires one inner layer. Supply pins can be combined, and you need one layer per voltage (technically, in a dogbone layout you could run the supply as a thick trace in the middle, but there probably are reasons this is not commonly done).

Trying to keep to cheaper four layer pcbs is one of the reasons for the SOCs with DRAM in the die stack.
I am confident that 6 layer is not that expensive in high volume, otherwise PC motherboards would be much more expensive

I partition a voltage area

weird way of partitioning but Ok, Again if you wish to share the project files, I can see about advancing the fanout for you

It is possible on 4 layers with a lot of work, although you won’t be able to do all the gpio. About half a year ago, I was messing areound with doing exactally this. I didn’t finish the board, but i did get the ddr3 bus finished, and power in, usb out, ethernet out, crystal, and some other needed pins. Also, I just used 1 ddr3 ic, not 2. 2 might be possible, but I didn’t have the board space.

A big part of why it’s possible is how the chips balls are placed (or not placed). The missing balls on the outermost layer form openings large enough to get I think 5 traces out. The larger internal openings allow you to fit vias in a clump and route around them all easier than a 1 via per pad setup. And as noted, most of the deeper internal balls are clumps of power pins and don’t need a via per pad, just a few per net.
If you like, I can post the board files here. I can’t make any guarantee that what I did would work if you just copy the design (I never tested it, and didn’t finish the power regulating circutry), but it does show how to break out the chip, and I’m pretty confident in the ddr routing.


Please do. DDR routing is hard to explain to beginners without examples