Right way to create non-plated slots for JLCPCB manufacturing

I’m trying to figure out how to do this the right way. JLCPCB states the following for non-plated slots in it’s capabilities page:

The minimum Non-Plated Slot Width is 1.0mm, please draw the slot outline in the mechanical layer(GML or GKO)

Am I right to interpret this as drawing slots in the “edge.cuts” layer? Doing so generates what appear to be right gerbers, but JLCPCB is unable to detect the outline of the PCB (and thus it’s size) if there is anything else than the outer layer in “edge.cuts”. (manufacturing ends up working with clarifications, but I’d like to avoid this in production runs)

So my question is, is this the right way to generate slots? what alternative ways could I use to create slots that may render better results?

Couldn’t find much info in the docs, thou I could be looking in the wrong place. I know for a fact that JLCPCB can correctly detect edges for boards with slots created in altium and eagle. Hopefully this makes sense, I’m a beginner with KiCad.

Can you show us what you have submitted? I’ve had panelised boards that have mouse bites and slots successfully manufactured.

Edit: here’s a project where I have an internal slot: https://hackaday.io/page/6633

Sure, should have done that from the start (cannot upload file to the forum, hope this works):

While these are just round holes, it’s an example, I’ll like to be able to do other shapes. (besides holes are bigger than JLCPCB maximum drill size)

JLCPCB analysis results yields “Can not identify the board outline”

Edit: Just to clarify, a file like this was actually successfully built, it just had to be manually checked and confirmed with me.

I have successfully used JLC with cutout areas.

The Edge Cuts layer needs to have the continuous pcb outline
AND
The pcb cutout areas. These MUST also be a continuous line.

For example I had a pcb with cutout for a high power rf transistor and for toroidal cores. Note I did not attempt to specify corner radius. The corner is the radius of the mill bit.

I suggest you use the 3D viewer in Kicad to view the pcb. It is very good at detecting misaligned lines.

I had no problems displaying your .kicad_pcb file in pcbnew’s 3D viewer which is a good test that all the outlines (external and internal) are closed. I notice that your panel.zip file contained not only the Gerber files but also a copy of the .kicad_pcb, the gerber job file, the project file, another gerber.zip file, plus MACOS metadata files. Are you uploading panel.zip to JLCPCB or gerber.zip? Maybe the extra files are confusing their analyser?

Just made a zip file for uploading the whole thing since I didn’t know exactly what you wanted to see :slight_smile:
But I’m only uploading the gerber.zip file. You can try it for yourself.

Thanks for confirming that I’m apparently doing things correctly at least.

Have you tried uploading Gerber files with Protel extension names? Some of these fabs use old CAM software and may not always be able to determine which file contains the EdgeCut layer when they all have .gbr extensions. Also try not checking X2 extensions when generating Gerbers.

Ok, I just discovered something, as soon as I add a VIA to this design, everything seems to start working fine. Maybe you can make sense of why this is the case, but I think I can work with that limitation since some of the holes I need should be smaller than their maximum hole size.

Thanks for the help troubleshooting (I tried extensions, protel names, all combinations and the result was the same)

:+1: ¯\(ツ):smiley:

This is far from the first report of flaky rendering from the JLCPCB web viewer. They also have problems rendering rounded pads and probably other features too. Nevertheless, they do seem to manage to produce boards which are as designed but the incorrect web rendering doesn’t fill you with confidence.
Might be worth writing to them - with enough complaints about the viewer they might consider updating it.

I was thinking about what made sense in this case, and my conclusion is that by adding a via to the board (or any other component for that matter) is probably what determines what’s the inside vs outside of the board.

Since I’m doing something pretty non standard (no components, just a panel), I imagine I cannot really blame them, But as you say, with clarifications, I was able to get good results regardless of their web rendering software.

Maybe you’re the first person who wanted nothing but cuts on the board so hit the bug.

I have successfully gotten JLC pcb that I use for front panels. There are no components or vias, just the outline and rectangular holes.

Btw use a full copper fill layer under the solder mask or it will be translucent. The silk screen won’t look right without copper. And make sure there manufactur number is on the Back side.

Just Curious…

• Is the goal to have a Face-Plate with:
1. Holes & Cutouts?
2. SilkScreen/other markings and text?
3. Does the material matter?
4. Is copper needed (for other than aiding appearance)

There are Low-Cost and easy approaches from DIY to 3D-print and everything in-between. Happy to provide suggestions. I’ve made many Face-Plates (CNC Mill, 3D Print with Raised Text… etc).

Quick Tip: if can use a 3D-printed face-plate, there are many “3D-Print Hubs” that provide same-day turnaround for a couple dollars and probably just around the corner from you…
Google “3D-Print Hub”

[EDIT] Added image of 3D Pre-Print, showing Material Cost ($0.14 US dollar)…

3D example (box and face-plate)
gp

I think it’s a reasonable price and quality compared to 3d printing. I also may have access to a laser cutter, so laser cut acrylic is another option for me.

Nice thing about PCB is that I can order with the accompanying PCB for the project and can silk screen plus use copper for some design accents (which I didn’t do in the example picture I’m posting).

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