Resolving DRC errors

Hello All,

This is my first post to this Forum, so if my question is not formed appropriately, please let me know.

A few years ago, I made some boards using V4, and I had no major problems, unfortunately, with V7 I have had many problems.

I am running V7.0.1-0 on an M1 Mac running OS 12.6.3. I have a very simple board, consisting of only a terminal strip and a DPDT relay. The terminal strip symbol and footprint came from the KiCad supplied libraries. The relay I am using is rather old (1980’s), so I used a symbol from the supplied libraries, but I had to modify the pin numbers to match the actual relay. I also had to make a new footprint to match that relay.

For this board I have 21 DRC errors “solder mask aperture bridges items with different nets” I do not understand what that means, and I have not found a way to resolve that error.

Any assistance will be appreciated.

Cheers,
ceulrich

See if this thread helps: Errors & warnings in DRC check

retiredfeline, thanks for the reply. I found it a few days ago, but it was not helpful for my problem.
Cheers,
ceulrich

It the board is that simple, maybe you can zip it (the whole KiCAD project) and share it here on the forum.

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I found it a few days ago, but it was not helpful for my problem.

The linked thread covers exactly your problem.

But we can try a second explanation, this time in other words:

  • soldermask items are shown where no soldermask is applied later at the fabricated board (negative mask during the board-layout-phase)
  • so at these places you can later directly touch the electrically conducting copper
  • normally between two different copper-items should be at least some soldermask, to avoid a easy short between two neighboring copper traces / copper pads
  • so in the board-view there should be no soldermask-item which overlaps two different tracks/pads
  • and this is exactly what the mentioned drc-check is testing: soldermask-items which are on two different copper-items at the same time.
  • So if you get these warning than there are such soldermask-items which are overlapping two different copper items.

So first switch on the mask-layer (so you could see the soldermask-items). Than click in the drc-error-dialog on the error-results - this should show you the offending items.
If you have drawn the soldermask-elements yourself you should reduce their size.
If the soldermask-bridging comes from the automatic soldermask pattern (on every pad) - maybe look into the board-setup–>Board stackup–>soldermask and set the values for:

  • solder mask expansion
  • solder mask minimum web width
  • solder maskto copper clearance
    all to zero.
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Hello mf_ibfeew, thanks for the detailed description of the error. I have not purposefully drawn soldermasks for any pad. I assume that the Screw Terminal footprint came with a soldermask. I do not know about the pads I chose for the relay. Every pad on this board shows that error. The attached shows the F.Mask layer for Pin 8 for J1. If I set all the mask parameters you listed to zero, I still have all the same errors.

So I second the idea from @der.ule : Kicad-manager–>Archive project and than upload that archive.

Maybe you need to read some other threads to get the next forum user-level (basic user) to be able to upload something.

One of the Moderators was kind enough to bump me up to a Basic User so I can upload a bit more data. Thank You!

If I understand correctly, I upload the KiCad file containing all info on the board in question. The zip file is about 1 Meg. Before I blow something up, please confirm that’s OK.

Cheers,
ceulrich

If I understand correctly, I upload the KiCad file containing all info on the board in question. The zip file is about 1 Meg. Before I blow something up, please confirm that’s OK.

Thats ok.

But if you want to decrease the zip-file-size (which is a good intention) you could look into the zip and:

  • delete all *.pdf-files
  • delete all meanwhile generated step-files
  • delete all meanwhile generated gerber-output files

Delete also all backups from the zip (but not from the original project :grin: ).

I have concluded that I have evidently stumbled into a larger problem than I expected. So, maybe it is time to simplify the problem. There is a KiCad document titled “Getting Started in KiCad |7.0 | English Documentation | KiCad.pdf.” Beginning on page 11 there are step-by-step instructions on creating a schematic and then a PCB. The project includes only a LED, battery, and a resistor. So, I followed the instructions exactly. The ERC for the schematic was error free. The ERC error list for the PCB turned out to be very similar to the PCB Relay board. All symbols and footprints come from the KiCad libraries, so one less variable to deal with. The zip file is about 0.5 Meg, so I have uploaded that.

Thanks for your continued interest.

Cheers,
ceulrich

Test 01.zip (471.8 KB)

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I already suspected it, but the project gave certainty. To conect pads (so to resolve the ratsnest-lines) you have to use the Route tracks tool, not the “draw a simple line” tool.
Kicad differentiates between tracks (these connect pads and get the same names as the nets in the schematic-side of the project) and simple copper graphic items (straight lines for example).

So you have to delete your red copper lines and instead use the “route tracks” command. See page 25 of the “getting started” pdf.

two remarks:

  • try to be precise with your wording: " The ERC error list for the PCB" → on the pcb there is no ERC, there is a DRC.
  • for the uploaded project: if you look into the zip-file you will see that the archive also contains all old backup-files (folder “Test 01-backups”). If you want to reduce the size → follow eeliks advice and delete these backup-folder

mf_ibfeew, thanks for the help. I had posted my problem on another Forum, and they were not able to come up with a solution, but the final piece of advice offered was that the solution would prove to be simple and obvious. That turned out to be spot on. I kept trying to change track widths, but could only find a way to change line widths, that was a hint that I completely missed. I will spend more time on proofreading for typos in the future, and yeah, I should have trashed the backups.

Thanks again for your patience and help.
Cheers,
ceulrich

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