Very good question. Looks like they are somewhat similar, in that the (old) issue #1 in that thread looks to be the load losing some net associations.
The newest versions seem quite a bit better, plus the Hidden Autoconnect looks to be live, and quite smart.
I tried the example issue #1, and isolated a via + track inside a plane area - that saves/loads just fine, preserving the net name ok. ie it does not lose net-names, even if isolated
Hidden Autoconnect is slightly different/smarter : it will try to apply a net name to any (net 0) item, if it can.
It does not need strict XY centre align, ‘end point inside’ is sufficient, but it does not like violations (DRC off is ignored by this alogrithm).
That’s good news for importing designs via gerber, and with the new manual Add-Netname features in this WireIt thread mention
Someone can import gerbers int GerbView, Save as PcbNew, (ideally without vias) then add parts manually to correct XY, and then manually add the netnames, using WireIt
As valid Pin/(Trace)/Netname sets are found, they will auto-connect to the imported trace polyline.
With care, you can never see a ratsnest 
The rule means once all pads are named, the trace polyline will auto-connect. A single renamed pad is not sufficient, because the trace polyline has a violation on the not-yet-named pad(s).