I’m new to KiCad, and am trying to make a very simple PCB based on this schematic:
My understanding was that the footprint pad numbers had to match the component pin numbers and the mapping would be made. Unfortunately, the ratsnest is completely wrong on the PCB layout. As you can see, pins 1 and 2 of the capacitors are connected when they shouldn’t be and there is no connection to the inductor’s pins.
What am I doing wrong?
Can you tell us which Kicad version are you using and possibly post this project?
Tom
The problem with the inductor is it isn’t actually connected to those wires. There are small open squares at the ends of the inductor which indicate there is no connection.
J1 is a single 8 pin connector on the schematic but it’s 3 individual connectors on the layout & the L1 doesn’t seem to be connected to anything
Pat.
They probably aren’t connected. This is a known problem when rats run on top of others. When you do the routing you should see the correct highlighted components.
“Blubberbub” wrote a cool patch to use arcs for ratsnests that will probably go into 5.1.
You can see it in action in the pic linked to comment #14: https://bugs.launchpad.net/kicad/+bug/1766597 .
It appears that the Fab layer depicts J1 as an 8 pin connector; and the ratsnest agrees with the schematic.
It would probably be helpful if the OP had included the silkscreen layer.
Correct.
On your schematic, what is the pin number on the top of all the capacitors? Are you certain that they are all the same?
Also, your screen shot appears to show the footprint of a radial capacitor, which is commonly/typically an electrolytic capacitor; and if so it will have a polarity.
Even if the part is not polar in nature, a square pad on pin 1 (the positive pin) will also add to the build’s readability.
As per hermit and jeff …overlaying ratsnest wires cause graphical glitches, were sometimes they vanish where there is 2 or more of them over each other…
If you want to test this:
Yes, they will.
As mentioned above, the inductor has NC [] boxes on the pins,which means it has not connected to the wires.
The apparent wrong rats nest, is likely merely a display artifact of multiple rats-lines overlaying.
Pick up a cap and move it, so the lines are not all on a grid, and check again.
Or, you can zoom in and read the net-names on the pads.
Version 4.0.7.
Thanks! I zoomed in on that and it looks like my wires had run over the inductor pins and not made a connection. That’s all fixed now.
J1 is layed out per the schematic. It looks good to me.
These are non-polarized electrolytics which is why I didn’t make pad 1 square. But I take your point about readability.
I’ve tested this and it looks like this is indeed the case. It just looks wrong but is actually correct. The thing that especially threw me is capacitor C6 where it just doesn’t look like there should be any reason for a line between pins 1 and 2 unless it was a genuine connection. Anyway, I’m glad there is a solution on the way:
Thanks everyone for your help!
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