I have a single pcbnew project which has two separate boards on it (meaning I simply drew two separate rectangles on the Edge.Cuts layer). The components are all part of the same schematic but I put the pots/buttons on one board and the ICs on the other. The idea is to later stack these two boards and have them connected via male/female header pins.
I put a 2x5 header pin on each board (at the same relative spacing). The pins are mapped equally on both boards so that they connect the same net.
For example let’s say board 1 has a button output connected to pin 1 of its header. Board 2 has pin 1 of its header connected to a microcontroller. In the physical world, once I stack the two boards, the microcontroller and button will be connected. But, I have a problem in pcbnew where it still draws rats nets wires from one board to the other because those two header pins cannot have traces running between them (since they will be physically separate boards).
So I’m wondering if there’s a way to tell the program that the boards are separate for now but will be physically connected later so that it doesn’t draw the rats nest across the two boards?
Alternatively, is there a better way to achieve what I want? Am I going about this general approach the wrong way?
You put the pin headers into the shematic and then you should use different names for the nets (as otherwise DRC in PCBnew will run lines between them).
Looks a bit confusing when you do it for the first time, but it works:
Example with the connectors that connect to each other sitting side by side.
XS101 and XS102 actually sit on different sub-boards.
Don’t know if others have a more efficient way of doing this, this is my 5th project overall and the 3rd where I did need board-to-board connections between subboards of the same project.
WARNING:
Make sure the physical connection is as you think it is in the schematic (XS1, pin 1 - XS2, pin ?, etc…) as this is a little bit confusing with those connectors being mirrored or turned upside down in final assembly. Check that several times… best a couple of minutes or hours apart
I know it’s probably not what you’re looking for and probably not the best approach, but to me, if it’s two boards, it’s two projects.
Ideally, I guess you’d like KiCad to have one schematic detailing a large multiboard project with several layouts pointing to that schematic, but that’s not supported and isn’t on any roadmap anywhere.
If you need a single NET name (and often that is useful, I have done dual-pane PCBs exactly this way ) then you could try making the project with dummy extra inner layers.
ie All desired routing is done on outer layers, and you reserve a pair of inner layers as ‘rats-nest-killer’, so you route those connections, and then DRC passes.
Simply do not plot those fix layers.
I ended up going with splitting the net names as per @Joan_Sparky’s suggestion. It seems to work pretty well and doesn’t add much complexity to the schematic. Thanks!
What would you guys recommend for solving the same problem but with GND? In other words, I have GND going through the header pins so that the boards share the same ground. I’d like to preserve the convenience of having separate trace widths for the power signals and of having to only add one type of copper fill for GND.
I’m not sure how to go about splitting the labels because I’m using the power component for GND instead of a plain label that I can rename.
Is there a way to have two ground labels and have them both be treated like a power net? Any other approaches for this?
Oh I just noticed that @Joan_Sparky indeed uses a separate ground label for the header pins. Does that mean that in the part of the circuit that uses that header pin you have to use that ground label instead of the standard GND symbol?
Yes, you need either specific net names or use specific symbols, with that net name included.
Fill areas need to track those net names.
Check the netlist generated.
or, you can do as suggested above and have GND everywhere and use inner dummy layer tracks between connectors, to keep DRC.Connect happy.
A plus benefit of the visible but dummy tracks is you can visually track pin-order and late pin-swap to get a cleaner layout.
