I’ve asked the same question on the RPi forum but none of the designers had replied. Since 5.1 branch, heck even v4 is perfectly capable to design differential pairs, I still don’t get why they had used nightly builds for this task.
Working today on the CM4IO board and still yet to see a reason.
Any ideas?
I will need to update my project to use CM4 instead of CM3+. I have installed both 5.1.8 and 5.99 KiCads, however the project is in V5 and I would like to keep it that way… Is there any possibility how to get the CM4 footprint and symbol to V5?
@Kedarius Stay with 5.1.8 and draw what you need manually. Use nightlies to inspect CM4IO.
I’ve been down the 5.99 path just for the same reason. KiCad got a new tester but I’m really slowed down. Although I’m happy to help somehow. Always wanted to contribute to the code side but couldn’t find enough time to solve the code base. For now, settled with testing 
I plan to stay with 5.1.8 unless something really important emerges - I would need to convince my very conservative colleague to use 5.99 So I plan to to use nightlies to inspect the CM4IO and use it as reference, exactly like you said.
However I am kinda sad that there is an already done footprint and symbol for the CM4 and that I would need to recreate it in v5. I do not need to convert anything other but especially the footprint would be great…
Edit: As I posted this post I realized that I should be able to convert the file by hand and it seems to have worked for the footprint (I just needed to tweak the file a little). Now I will try to work on schematic symbol…
Believe me, 5.99 is not ready for prime time. You can see it from the bug tracker. But it is getting there. The developers are really working hard to stabilize it.
Draw the footprint manually. It would be much faster and you’d be much happier
I’m sure this was a decision of an action loving engineer from Raspberry Pi Foundation. They just used what we had with 5.1 already.
I do believe you, I want to use stable 5.1.8. I just do not want to redo 200 pads footprint… Especially as the one in V5.99 project is done by the vendor of said product
Very easy. Use “Create array” feature… Will be very fast.
One more question. How should I solve the issue, that the footprint for CM4 are de facto two 100pin connectors?
As far I did not find any good solution. Either I will use two symbols, two footprints (I could probably use the Hirose connector footprint) but I will need to maintain their relative position. Or I will use one symbol (possibly with two or more units) and one footprint. The second way will keep the relative position of the connectors but I will have only one item in BOM and pick and place file…
The way I think that I would approach this would be to have one footprint and a multi-unit symbol. Maybe several multi-unit symbols for me to choose depending on how I want to split up the pins. First approximation would be for two symbols units, each representing the two different connectors. But as I lay out the schematic I may end up splitting the symbol into function-based units. This would work, but to order the right parts you would need to have a single internal inventory number/identifier to tell you to order two Hirose connectors and the compute module.
If you are concerned about getting all the bits onto a single schematic driven BOM, I would end up with two footprints (one used twice) and an additional symbol (to the multi-unit one, above) used twice. I’ve done this with socketed ICs before and gotten a good BOM with just a small amount more effort than the above process. Like above, the multi-unit CM symbol would link to the footprint that has all the pins layed out with the correct spacing to each other as well as an overall outline on silkscreen and/or fab layer. I wouldn’t put a courtyard on this footprint to allow putting low profile discretes (like bypass caps and/or biasing resistors) under the module without DRC yelling at you. The additional symbol wouldn’t have any pins and is for getting the Hirose board-mount connector into the BOM, and you would need to place this symbol twice. Give them manual Ref’Ds that logically links the connectors (being used like an IC socket) to the compute modules Ref’D to make it easy to pick out when looking at your BOM in spreadsheet form. The footprint for this would have the outline on silkscreen and/or fab and courtyard for a single Hirose connector. There should also be some feature in the connector footprint that PCBNew can snap to for placement to the CM’s footprint to make sure alignment is by object snap instead of eye-ball and/or manual math.
That’s my $0.02, please take it for what it’s worth. ($0.02USD) 
To be quite honest I am not so concerned about BOM, more about pick and place position file… I expect the final PCB be assembled by a board house (probably by PCBWAY) and the worst thing is that the PCB arrives and I would not be able to plug the CM into the connectors because they are misalligned by a half a millimeter
One more option I am considering is to make some sort of automatic BOM/PnP modifying script. I am using a automated “build” process for creating all my fabrication outputs from Git so I should be able to replace on footprint with two. The downside is that I would need to compute the correct positions of the connectors but once the script would be done it would be perfect every time…
Well, with my second method, you should hopefully get proper PnP coordinates for the two Hirose connectors. Something I thought of for proper alignment if there is room between the connector pads is have two extra pads on the CM footprint. These pads would SMT and as small as possible, kinda of like a micro fiducial. These pads would be where the PnP origin for the Hirose connectors are so when placing each Hirose connector outline you have a SMT pad to snap to. I haven’t looked at the Hirose connector but I imagine that it is probably pretty high density so there might not be a good empty place for the fiducial-like feature. Maybe you’ll luck out and the PnP origin for the connector is already centered on an existing pin.
@Kedarius I normally use a single footprint consisting of two Hirose connector details and edit the BOM manually, as I don’t worry automatic P2P. But maybe I need to start considering this.
Well, my I am more software developer and system administrator than electronics engineer. So I prefer to spend my time with creating robust automation to create good fabrication outputs and have the assembly outsourced to the board house
I already have the script to rotate the parts in CPL file so creating a step to split the CPL line into two should not be so difficult…
I’ve compiled material from various sources - footprint from V6, schematic symbol from pinout (via KiPart), 3D steps from Raspberry, etc… and I created github repo for KiCad 5.1…
Footprint is the whole compute module and its origin is moved to center of the connectors. So the modification for the pick and place file should be simple… I will try to work on in next time…
No the question which brought me here, I was just looking at the CM4 carrier board PCB design. and noticed some gap (beneath SO8 and HDMI1) and some traces between two copper areas at the bottom layer.
Is there somebody here who knows if it’s just by design (and does the real board has this as well) or am I looking to some bug, from the beta version ?
It’s as if the other items have moved horizontally relative to the bottom side zone and the zone not refilled.
Thanks for the quick replies. Actually a bit silly, I did not restart the application, because I was under the impression the design was like this. (refresh, zoom, layers on/off had no effect)
After seeing your screenshot I opened it again and now it was ok.
At least I know the design file is ‘kind of’ correct. The photo’s I see from this board are different, they show rev 1.4 on the silkscreen, which I do not see on mine (or do I have an old one ?). I am wondering if this design still has some surprises when using it as a starting point for a custom version.
I did a simple Kicad-5.99 to Kicad-5.1.x footprint script converter.
Only tested with kicad-r20400.320ca5a0d0-x86_64 and KiCad-5.1.7 to convert Raspberry-Pi-4-Compute-Module.kicad_mod
Fell free to use, test, improve and share.
#!/bin/bash
nightly_footprint=$1
# Kicad-5.99 to Kicad-5.1.x footprint converter
# - Layers do not have quotation marks
# - Pads do not have tstamp
# - Pads do not have quotation marks
sed -e 's/\(tstamp [^\)]*\)//' $nightly_footprint > stable_footprint.kicad_mod
sed -i 's/"\([[:digit:]]\+\)"/\1/g' stable_footprint.kicad_mod
sed -i 's/ ()//g' stable_footprint.kicad_mod
sed -i 's/"F.Cu"/F.Cu/g' stable_footprint.kicad_mod
sed -i 's/"B.Cu"/B.Cu/g' stable_footprint.kicad_mod
sed -i 's/"F.Adhes"/F.Adhes/g' stable_footprint.kicad_mod
sed -i 's/"F.Paste"/F.Paste/g' stable_footprint.kicad_mod
sed -i 's/"F.SilkS"/F.SilkS/g' stable_footprint.kicad_mod
sed -i 's/"B.Mask"/B.Mask/g' stable_footprint.kicad_mod
sed -i 's/"F.Mask"/F.Mask/g' stable_footprint.kicad_mod
sed -i 's/"Dwgs.User"/Dwgs.User/g' stable_footprint.kicad_mod
sed -i 's/"Cmts.User"/Cmts.User/g' stable_footprint.kicad_mod
sed -i 's/"Eco1.User"/Eco1.User/g' stable_footprint.kicad_mod
sed -i 's/"Eco2.User"/Eco2.User/g' stable_footprint.kicad_mod
sed -i 's/"Edge.Cuts"/Edge.Cuts/g' stable_footprint.kicad_mod
sed -i 's/"Margin"/Margin/g' stable_footprint.kicad_mod
sed -i 's/"B.CrtYd"/B.CrtYd/g' stable_footprint.kicad_mod
sed -i 's/"F.CrtYd"/F.CrtYd/g' stable_footprint.kicad_mod
sed -i 's/"F.Fab"/F.Fab/g' stable_footprint.kicad_mod
Remember that there is no guarantees. So use at your own risk.
Main reference: https://github.com/jcyrax/pcbmodelgen/issues/10
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