Quick question about bypass capacitor placement

Hi everyone,
I have a quick and probably easy to answer beginners question regarding the bypass capacitor placement in the following application.
I am using an InvenSense MPU 6050 in my project. The data sheet gives us the following typical operating circuit on page 22 section 7.2:

Now I was referencing another project that connected these bypass capacitors like this:

From the typical operating circuit in the data sheet I made this one:

My question is: Are these two schematics electrically the same? Logically to me they are, as the ground plane will connect all pins connected to ground. However I wanted to ask here because maybe some pins have to be connected to these bypass caps directly before being connected to the ground plane. To be sure I wanted to ask here :slight_smile:

Yes, they are the same. It doesn’t matter where you place symbols, you can even have bypass caps on another sheet if you want, as long as same nets are connected to same pins it will be the same.

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Awesome! Thanks for the qu1ck reply :smiley:

In modern fast circuits you sometimes have to consider even the inductance of wires connecting internal structure of IC to pins of its case. The old microcontrollers in DIP 40 sockets had GND at pin 20, and VCC at pin 40 far away from each other. Now you can find many microcontrollers which have VCC/GND pin pairs at each of its edges. You should connect blocking capacitor directly to each such pair and it is much more important than how the wires look at PCB connecting GND and VCC to each of this pins.
This approach takes use of coupling between this GND and VCC wires going inside IC packages very close to each other. This coupling helps to keep voltage at IC structure (betwean its VCC and GND) constant, even they both floats against the surrounding potentials. So you have 3V3 at capacitor and you have 3V3 at structure, but GND of structure can be not exactly the GND of a pin (VCC also). We are speaking about times in less then ns ranges.
Digital ICs takes short pulses from their supply during switching. What is emitting the disturbances is the high frequency current times the area in space it surrounds. Compare that area for old 40 pin DIP package and new package with VCC/GND pairs at pins next to each other.

See also Does the connected trace to VCC matter here? where I collected links to articles about bypass capacitors.

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