I have some circuitry that I’m not terribly concerned about troubleshooting the boards, but there is some concern that I have about not prematurely revealing the schematic IP through reverse engineering. For my prototypes it’s fine to use my engraver to mill the circuit out of double-clad board material, but when I go to make a finished product I’d like to have all the relevant IP on the two inner layers, the outer layers COULD be ground and some power distribution but in my case that isn’t very important either. What I’m wondering is I get along well with freerouting.jar, I can use what it comes up with for the inner layers, the parts are MOSTLY SMD with a few higher power THD parts. Should I be looking into buried vias or microvias (not too familiar with either) to keep most of this hidden, are these expensive? It seems like the inner parts are better hidden if I can autofill the outers with copper everywhere there are no footprints in copper. Do I have a couple of “obvious options” for kind of automatically extracting both of the external layers from the autrogenerated ones? I like the features freerouting does provide but there doesn’t appear to be a “those layers are fine, now bury them” button to click on, but I’m concerned that to the extent I have to think hard about what I’m doing it’ll be very prone to error. I’m hoping somebody may have already thought this all through, so far I haven’t really had any great difficulty, these tools are “the bomb” I just need help figuring out the rest of it, thank you in advance for your help!
People reverse engineer IC chips by etching away layers. This is done with chips of companies with money and legal teams.
If your board has any value, it won’t take long until someone to clones it regardless of where you put the tracks.
Not trying to be negative but getting a good working design may be at odds with what you want to do by burying layers. Obviously you would have to share your design for us to know that. Generally people report boards with buried vias are more expensive. Free routing you might have to trick into accepting a 4 layer design. Feed it two at a time, etc.
Do you have any high frequency components? That makes for all sorts of fun with ground planes. Board stack up can be quite tricky, especially if this will be a commercial product that will have to undergo independent testing.
Yes there are functional advantages to having most of the circuitry on a top layer and a ground plane separated from it by a thin dielectric layer. Often this is not critical but it depends upon your design’s need for minimizing stray inductance and stray coupling. Also having most of your interconnect circuitry be buried would (I think?) greatly increase the number of vias required. If your component connections and interconnects are mostly on one layer (top or bottom) that reduces the need for vias.
And for PCBs you don’t even have to destroy the board to reverse engineer it. Modern 3D X-ray machines can image all the layers and component joints of incredibly high density boards in a few seconds. As soon as a board is out in the wild, it’s only a matter of time and perceived value before it is liable to get a close inspection.
Actually I got the idea by looking at the PCB of someone else in my industry! I suppose “anyone can” use X-ray machines but I’m in a “niche market” and like I said I can’t STOP anyone from doing reverse engineering but I wouldn’t mind doing what I can to slow them down. Understand this isn’t a cell phone or a computer, digitally there isn’t actually so much as an MCU on it. My nightmare is some lone cowboy Chinese tech coming out with a clone of what I’m doing like the very next day. Anything that goes in the opposite direction of posting my schematics on a public forum at least buys me a few more weeks or months of market that I can work.
I can usually tell what connects to what from the part placement and a general impression of what the circuit does. Maybe 10-15 minutes of poking around with a continuity checker to confirm a few confusing parts. Visible traces are just a bonus. Good luck lol
Again you’re relating to this from a digital world, outputs connect to inputs etc., you look up the part # you get functionality so you know where “it fits”. In my circuits you’ve got op amps, transistors, diodes, passives and NO CLUES. Why do I need to justify this? Is there a simple command to split a layer into three others, like tracks, layers and footprints, then combine them as needed? I’m not trying to convince you that YOU would ever need this, it’s for MY requirements!
Nah, not relating to anything from a digital world. Not sure why you’d assume that, you’re not the only one on the planet who works with analog electronics 
No need to justify anything, do what makes you happy, but prepare for disappointment.
Of the questions I asked you answered nothing, so I guess that’s what you know.
lol, usually it’s the clients who don’t want to be told they’re asking the wrong questions, not the engineers 
A long time ago (about 1980) being a student I was asked if I will be able to repair PCB from car wheel balancer.
It took me 3 afternoons to draw its schematic (PCB was about 15x30cm full of elements) and next 3 afternoons to understand how it works (I have never seen such machine working). There were only analog circuits on that PCB. During wheel rotation two samples were remembered at capacitors and they were later used (using 50Hz power) to recreate the amplitude and phase of the wheel vibration to show (at analog meters) what weight and where on wheel to put.
P-MOS was burned. I had no way to buy P-MOS those time in Poland so I replaced it with J-FET (the only transistor with 0 input current I had - was needed to not discharge capacitors during second half of working) having to change the schematic by cutting tracks.
Don’t assume that anyone (really needing it) will have a problem to draw the PCB schematic having that PCB in hands.
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