I just made a board which used a QFN-56 (the RP2040) for the first time. They told me that applying paste via the stencil resulted in excess solder paste which had to be manually touched up, quite extensively.
After focusing on getting the board to run yesterday, I’m starting to research this stencil / solder paste issue. I used the standard KiCad footprint. Does anyone have experience making boards with chips in this package? If so, we’re there any special tweaks you needed to apply to the footprint and/or solder process?
My client assembled it before I arrived on-site, so I didn’t see this issue in person. I will ask today more details about what solder paste they used, etc. They routinely assemble prototypes with much finer pitched parts, so that’s why I’m questioning my stencil pattern first.
Thanks,
-Chris
I hereby certify that I am not simply asking someone else to design a footprint for me.
Check. I am asking for suggested tweaks to an existing KiCad library footprint
This is an auto-generated message that is in place on the “footprints” section of the KiCad.info forum. If I remove it and ask for a footprint to be designed anyway, I understand that I will be subject to forum members telling me to go design my own footprint or referring me to a 3rd party footprint site.
. . . if the KiCAD footprint is the same then you have done what is recommended and just about all you could be expected to do in preparation for prototype board build.
1 The footprint on the board should not always correspond to the stencil (shape size)
2 The size of the solder paste is controlled by the thickness of the stencil and the size of the aperture in the trvfaret
3 Kicad can’t edit gerber past and others…
Without the specific thickness of the stencil and the size of the stencil apertures (the gap that could ruin everything in gerber), this is only a picture
Looking at the picture you showed…
About paste at thermal pad I have seen information telling it should be 20% and others 80%.
I am trying to have it around 50%. And I have 0.3mm vias in that pad so may be some of paste goes there.
Of course it also depends on stencil thickness but it is decided by our contract manufacturer and I have no knowledge about it. Recently asking him for advice on this subject one of them was that it is better to have apertures not close to the thermal pad edges. It is because when machine places element (with some impact) at PCB the paste may splash. We were speaking about footprint with thermal pad very close to other pads.
There are indeed many factors involved, also how well the stencil is held down to the PCB, if the process is manual for prototypes or automatic for production. For prototypes sometimes things don’t go easy and the process is an opportunity to learn solder paste age and temperature can also play a big part.
We don’t make many prototypes at the moment so we have some very, very old paste in the fridge, it’s an expensive thing to throw away even if it is past it’s best.
My first experience with fine pitch chips was eighteen years ago.
We designed 2 boards with the same microcontroller and they were assembled by different companies. One of them asked for a stencil with 50% narrower than the standard (only for that chip).
Both results were optimum. I don’t know yet the real reason. I learnt to speak to the assembler before generating the gerber paste layers.
The same procedure is valid for the thermal pads. With too much solder the chip floats on the paste while soldering and gets biased.
Till that moment I assumed that a problem was with central thermal pad.
But may be it was with all those small pads.
At the picture RaptorUK showed (I don’t know if it is what was used) openings at all those pads seem to have margin = 0 what is wrong (3 years ago I didn’t know it). You need a margin (opening have to be smaller than a pad) so that the placed stencil seals on the edges of each pad, because if not, the paste is pushed next to the pad.
This gap directly affects the applied thickness of the stencil it can be 0 and 0.3. You need to know more information to make recommendations… It is advisable to see the entire coat of arms and not one site
@m852 this indeed may be part of the problem. I spoke with their guru on such matters yesterday (although it wasn’t him who performed the paste application on my boards). He immediately questioned the thickness, as you point out. He says the quick turn shop sends a 0.15 thick stencil by default, and suggested we ask for a 0.1 thick next order.
He also questioned the technician who did the work at length about the solder paste itself. There was some concern the wrong “size” (the micro solder balls) was used, specifically the use of too large a paste. But the conclusion was the guy didn’t make that mistake — if anything, he used a paste that was perhaps too small for the situation. Whether that could be an issue or not I don’t know. Anyway, we’ll be making a follow up board next week and I’ll report how it goes.
General recommendations…
1 For 0402-0603 stencil thickness 0.1 or less
2 Step 0.5 requires Class 4-5 paste
3 On wide areas, do not make large cuts on the stencil (affects the strength and galling with the paste entering the stencil) when dividing into sectors, air escapes from under the housing, which prevents the part from moving in the furnace
4 In a small step, use a screen printer with a vertical elevation of the frame (90 degrees)
5 When developing a device, try not to place parts of different sizes on one side (relevant for the series)
6 Before making a printed circuit board, send the faila stencil gerber to the technologist where you want to make them
solder paste age and temperature can also play a big part.